@HPC Podcast Archives - OrionX.net - HPC News Bytes – 20260817

Episode Date: August 17, 2026

- Riemann Hypothesis advances via AI - AI agents need inference budget for computational research - AMD Reasserts FP64 - Algorithmic vs Numerical Emulation - zHBM, HBF expand memory-storage hierarchy - China’s answer to IBM-AMD QEC and NVQLink - THQLink built on TH-Express [audio mp3="https://orionx.net/wp-content/uploads/2026/08/HPCNB_20260817.mp3"][/audio] The post HPC News Bytes – 20260817 appeared first on OrionX.net.

Welcome to HPC Newsbytes, a weekly show about important news in the world of supercomputing, AI, quantum computing, and other advanced technologies. Hi, everyone. Welcome to HPC Newsbytes. I'm Doug Black, and with me is Sheehan Khan. The Riemann hypothesis is a math problem. In fact, it's a standing challenge to mathematicians that dates to 1859 and offers a prize of $1 million to the math whiz who can solve it. Speaking for myself, when this problem is described as inscrutable, I absolutely believe that to be true. Anthropics Claude AI did not solve the Riemann hypothesis, but it's been reported that Claude produced a substantial new result around it. The hypothesis says, roughly, that all of a particular class of zeros of the Riemann Zeta function lie on one critical line.

Mathematicians had previously proved that at least 41.6% do. An unreleased Anthropic model increased that lower bound to 67.2%. According to Anthropic, the model explored roughly 650 ideas using 60 sub-agents and about 31 million output tokens. Human mathematicians reviewed the resulting work, and Claude also generated a formally verifiable proof. Importantly, that 67.2% does not mean that the Riemann hypothesis is two-thirds solved. Proving any fixed percentage below 100% is fundamentally different from proving that every qualifying zero lies on the line. Sadly, Anthropic itself says it does not expect this particular technique to prove the full conjecture, which means the Riemann hypothesis continues to maintain its inscrutability.

A couple of months ago, we covered Open AIs proof of a math problem that had been elusive for 80 years. This is fundamentally the same kind of a thing. AI is taking advantage of all the information that humans give it, it remembers it all, and can look at many combinations of possibilities or iterate many more times than humans can. The impressive part, and we touched on it last time, is that it is able to make what I called a perceptive shot in the dark. Now, it doesn't get more logical than math, but it's also impressive, nevertheless, that the model has enough logic to follow a good lead and synthesize the result. In this case, the model was given a very hard open-ended task, generated hundreds of approaches, rejected failures,

coordinated many parallel agents, searched existing mathematical ideas, and ultimately produced something that experts considered new and valid. That begins to look like. That begins to look like actual computational research. And it accelerates the idea that such approaches can work for other scientific topics. We should expect that capable models will be given large inference budgets to see how much useful discovery they can produce. AMD's upcoming MI430X accelerator is taking a different design point from the industry's trend toward low-precision AI chips.

AMD says the accelerator, scheduled for delivery next year, will deliver 288 terraflops of native, floating point 64, 432 gigabytes of HBM4, and 23.3 terabytes per second of memory bandwidth. HPCWire reports that the FP64 figure is nearly four times that of AMD's MI355 and substantially above earlier expectations. Also striking is the comparison with NVIDIA. Rubin provides about 33 tarflops of native FB64, although NVIDIA is pursuing techniques such as Ozaki-based emulation to produce higher effective double-precision performance on suitable workloads.

AMD is positioning the MI430X for traditional HBC modeling and simulation mixed with AI. DOE's forthcoming discovery system at Oak Ridge, and France's Alice Rococke XSyscale system are both slated to use MI430X accelerators. AI economics are pushing silicon towards low precision. GPUs started with 32 bits, worked very hard to get to 64 bits, and then they were discovered by AI and rapidly moved back down to 32, 16, and now 8 bits and 4 bits, and there are algorithms that can use even fewer bits. Certain calculations can use algorithmic emulation, like the Ozaki model you mentioned,

to use low-percision hardware to produce high-percision results and still come out ahead in terms of speed. But traditional scientific simulation is still important and has workloads that require native FP-64 and do not map cleanly to emulation. The big question is exactly how substantial those 64-bit workloads are, and especially as AI libraries and approaches are used inside HBC applications. If it's a minor fraction, you can use much slower numerical emulation when algorithmic emulation doesn't work, and maybe that's okay.

They would probably require code changes too. But if it is really substantial, then native 64-bit hardware becomes necessary. With MI430X, AMD is betting there will be enough demand for serious 64-bit hardware, while Nvidia's approach is more aggressive with the use of low-precision hardware. The AI memory wall is under attack from several directions. Samsung unveiled Z-HBM, which proposes stacking HBM vertically above the accelerator rather than placing it beside the processor. Samsung projects four to eight times the performance of HBM5,

along with higher density and better power efficiency, although this remains future technology. It also introduced faster 3D NANDI concepts. Separately, S.K. Heinex and Sandisk are developing high bandwidth flash or HBF, which applies HBM-HBM-HBF-like parallelism and 3D stacking. HBF would be slower than DRAM, but far denser and cheaper, potentially making it useful for huge KV caches and other inference. data that cannot economically live in HBM.

Together, these developments suggest that the traditional hierarchy of HBM, DRAM, and SSD storage is becoming much more fluid. Data is the new oil, as they say, and AI needs all kinds of fuel, including data. Token generation often depends on memory bandwidth and memory size to enable big key value data structures held in so-called KV caches, especially for inference, GPUs are finding that they need to share the stage with memory. We mentioned the memory storage hierarchy last week, and these technologies roll right in to, shall we say, enrich the hierarchy.

Data placement software becomes important to optimize what data is placed where according to bandwidth, latency, and cost. ZHBM attacks distance, physically moving memory closer to compute, while HBF attacks capacity and economics. by creating another tier between expensive DRAM and conventional flash. Over the decades, we have seen Chinese systems challenge supercomputing and AI advances from the West. A new paper from researchers in China last week takes on one of the biggest problems in quantum computing, and in the process provides China's answer to NVQ link.

The August 5 paper on the archive site is from researchers at National University of Defense Technology, in Changsha, China. They propose an architecture called THQ Link that connects a quantum processing unit or QPU control system to conventional HPC resources, making HPC part of the real-time machinery needed for fault-tolerant quantum computing. Quantum error correction continuously measures physical qubits and produces syndrome data describing possible errors. That data has to be decoded quickly enough to determine corrective action before the next rounds pile up, potentially on microsecond timescales. The authors of the paper report an average network round-trip latency of 2.9-44 microseconds,

adding about 130 nanoseconds for each additional hop. Using CPUs and a parallel window technique, they demonstrate real-time decoding of surface codes up to distance 19, while operating at a one microsecond QEC round. The work is an architecture demonstration rather than a complete fault-tolerant quantum computer, but it addresses a very practical scaling problem. Listeners of this podcast would recall that we covered similar advances last year by several vendors.

IBM and AMD worked together to process quantum error correction using AMD's FPGAs, and InVIO announced NVQ, link, which connects a supercomputer to a quantum computer and manages tight connection and error correction. For example, Quantinum's system uses it via NVIDIA's KudaQ software for exactly this purpose, to handle low latency quantum error correction. So as you said, THQ Link is China's version of the same concept, but with an interesting,

big difference, and that's about where you do the computational load for decoding. Whereas the IBM-AMD or NVQ-Link solutions do the heavy processing in dedicated attached hardware, offloading the supercomputer, THQ Link goes further on board and does the decoding work on the supercomputer itself. This is very much reminiscent of the offload versus on-load debates with Infiniband some years ago. So the interesting part is that THQ Link relies on TH Express, the interconnection. that's used in Tiani 2 supercomputer. TH Express is not an infini-band clone, and it uses custom Chinese chips, but it broadly implements the same architectural concepts,

including offloaded RDMA engine, for example. So it is interesting that the same concept was not used in THQ link, and the workload is actually done on the supercomputer rather than offloaded. China's lag in semiconductor technology shows up everywhere and forces some of these architectural choices, as well as needing more hardware than Western systems need to get to the same performance levels. Back to quantum computing, as quantum computers get larger,

they generate a substantial workload for classical computers just to keep their logical cubits alive. That workload is another dimension to how HPC enables and then uses new capabilities like AI and quantum technologies. We discussed a lot of these topics, in an excellent conversation with our special guest Olivier Ezrati a couple of months ago.

And I highly encourage you to go look that up. All right, that's it for this episode. Thank you all for being with us. HPC Newsbytes is a production of OrionX. Shaheen Khan and Doug Black host the show. Every episode is posted on OrionX.net. If you like the show, please rate and review it. Thank you for listening.