Grey Beards on Systems - 153: GreyBeards annual FMS2023 wrapup with Jim Handy, General Director, Objective Analysis

Episode Date: August 17, 2023

Jim Handy, General Director, Objective Analysis and I were at the FMS 2023 conference in Santa Clara last week and there were a number of interesting discussions at the show. I was particularly struck with the progress being made on the CXL front. I was just a participant but Jim moderated and was on many … Continue reading "153: GreyBeards annual FMS2023 wrapup with Jim Handy, General Director, Objective Analysis"

Hey everybody, Ray Lucchese here. Jason Collier here. Welcome to another sponsored episode of the Greybeards on Storage podcast, a show where we get Greybeards bloggers together with storage assistant vendors to discuss upcoming products, technologies, and trends affecting the data center today. And with us here today, Jim Handy, General Director of Objective Analysis. Jim's been on the show a number of times before. Ray and Jim recently attended the Flash Memory Summit Conference in Santa Clara,

and Jim moderated a number of panels there. So, Jim, why don't you tell us a little bit about yourself and what was your most interesting takeaways from the conference? Well, I'm an industry analyst following memory markets, most of all, but the semiconductors in general. I've been doing that for a number of years and try to spend every year that I can, you know, after COVID, I'm starting over again, but try to spend every year that I can at the Flash Memory Summit, just because there are a lot of exciting things that go on there. Yeah, it seems like it's broadened considerably beyond just Flash.

Yeah, yeah. They're trying that intentionally just because there's a lack of any real conferences to cover other memory technologies. And Flash is the second largest memory technology. DRAM outshines it. Huh. Interesting. So what do you think was the pretty hot topics that came out of Flash Memory Summit? Well, something, Ray, that was really interesting was that the first morning, when you

wouldn't really expect a lot of people to show up, there were a couple of market sessions to talk about what was going on with the market, the current status of things. And those were standing room only audiences. So people went out of their way to listen to analysts, myself included, talking about what we thought was going on with the marketplace. And that just kind of shows that there's still an awful lot of unease and, you know, interesting stuff going on in the market. Yeah. Yeah. Yeah. So what is going on with the market these days? It's, I like to say that there are three phases for memory pricing. The memories during a shortage, they stay flat, sometimes go up. And then when there's, when that shortage turns into an oversupply, then they collapse to cost.

And those are usually pretty alarming collapses. In the case of the most recent one, prices of DRAM fell at about 70%, 70%, not 17%. So it was like a big fall. And after that happens, then the prices track costs, which follow a Moore's law kind of a decline until the next time there's a shortage. So we're at that point now where prices are at cost and manufacturers are not going to be making any profit until a shortage gets, you know, achieved. And it's all cyclical, right? These things follow one after another, right? Yeah, yeah.

You know, I keep on hearing people say, well, this time it's different. And I say, well, this time it's different. And I say, well, no. It's never different. Especially in technology, history tends to repeat itself. It's like a stuck record for those people who remember what an LP was like. Yeah, yeah. Well, us graybirds all remember that stuff. Oh, yeah.

All right. So the market's where it's at. And we'll expect another cycle here showing up here shortly. when they are asked by investors, when are things going to get better? They say, well, we expect to see things get back into a normal kind of a track somewhere in the middle of next year. But they don't say that with a whole lot of commitment. So I'm not expecting to see, I don't believe that that's really a firm thing. And I don't have a real way to analyze the numbers in a way that predicts that accurately. This is a demand-driven cycle. And it's really easy to predict the fate of supply-driven cycles when people over-invest in capacity. But when demand undergoes a big change,

which is what we had with the return to work from COVID when everybody stopped using Zoom for all of their meetings and when kids started actually going to school instead of doing online schooling and people started going back to movie theaters, et cetera, et cetera. That ended up causing the hyperscalers to stop investing in infrastructure to support all of that. And that rippled down through all the different hardware channels, the people who were, you know, shipping to those hyperscalers. Yeah. Interesting.

So what's, what's next from your perspective? I was of interest at the. Yeah. Well, well, we, we did see a lot of interest in um cxl it's the next big thing you know there was an awful lot as a matter of fact um intel sponsored sessions that were just to educate people about cxl um but there were a lot of sessions that weren't a part of that that also highlighted cxl uh there's just an awful lot of interest in that technology. I find it kind of interesting because CXL does add latency to your main memory, but because of the fact that it supports a really high bandwidth, it's a trade-off of bandwidth and the

size of the memory because it supports a larger memory size than you can have direct attached to the processor. So, you know, is it... I heard, I was talking to a processor guy on the CXL consortium, and he said there was something that they're trying, you know, the challenge is the bandwidth per core, the memory bandwidth per core is starting to become a bottleneck with just regular DRAM yeah it comes it comes down to like you know with that it's like PCI lanes are a big component and one of the interesting things that I've seen on some CXL benchmarking is that the latency introduced in it is actually not much different than a multi-socket system.

So one of the interesting things that we've seen hyperscalers looking at is the ability to use single socket systems with CXL enabling them to use DDR4. A lot of new processors are like DDR5, right? And that's when you think of a hyperscaler, you know, changing out, you know, you know, 20 DIMMs is one thing, changing out 200 million DIMMs. That's another thing, right? It's a scale issue with those guys. And one of the things this allows them to do is utilize that investment they've got and they've made in DDR4 to get, you know, basically a result that is very similar to what having a multi-socket system is. As far as reusing, you know, a lot of the components they've already got with newer generation tech.

So that's, I think CXL has got, there's a lot of these little corner use cases. It's going to be really interesting to see over the next couple of years, how those corner case use cases turn into basically kind of killer apps that CXL could be used for. That's actually a little bit different from what I've heard. First of all, DDR4, the DDR4 versus DDR5, there's no interchangeability between those two. That if you have a processor that communicates with DDR4, it cannot communicate with DDR5. Right. If it's behind CXL, Jim? If it's behind CXL, yes.

If it's behind CXL, yes, it can. Yeah, that's where they're using the CXL piece, right? Okay, fine then. Yeah, because it does erase the differences. Now, the thing that I've really heard from the hyperscalers as to why CXL is good for them is because it gets rid of a problem that they call stranded memory, which is that if you've got, you know, let's just say you've got 128 gigabyte servers and you've got a mostly running 32 gigabyte programs and using only one quarter of the memory so the rest of the three quarters is sitting there but yeah you have one application that requires 128 gigabytes but you don't know which server it's going to go on so all the servers have to be equipped with 128 gigabytes. And so, yeah, you've got an awful lot of, like you say, Ray, just wasted memory.

And this is a way of getting that down. And Jason, what you were saying about the core, they call them hops, or at least that's what I've been hearing them called. That is kind of an accurate representation of CXL latencies. I think the CXL latency specifications were worked around that. And I know that the guys at Microsoft Azure, their exercises to find out whether or not CXL was going to be a good thing for them, what they did was they just prototyped it using sharing memory on multi-socketed systems. Just to see what it would perform like and stuff like that?

Yeah, yeah. They just use that as a model for how a CXL system would work. So it is effectively what a multi-socket system would look like. Yeah. And it's interesting. I mean, I think from this latency perspective, when you're talking memory, I mean, it's almost like, so we're getting into this tiered kind of memory system, right? Where you think of going from like HBM to like a DDR5 and then basically then attaching like DDR4 onto, you know, a CXL plus.

It gets pretty interesting, right? You know, so now you've got these different tiers of memory that then applications could be made aware of. It's going to be interesting to see the software developments that actually make that push forward over the next couple of years. The software guys were at the show, too. I think Memverge was one of the key players there. They've been doing this tiered memory with Flash, actually, for quite a while. And they're finding that they can take, take advantage of that sort of technology for CXL as well.

Yeah. And, and if you're going to be using persistent memory, there are lots of different flavors of persistent memory, not just Optane. There's MRAM and resistive RAM and, you know, ferroelectric memory and phase change memory. And all of those are slower than DRAM, but they're faster than flash. So what do you do with them? Do you stick them in a flash application and squander that extra speed? Or do you slow down your DRAM system so that it can accept these guys?

You know, neither one of those is good. So you're saying that this might be the killer app for these other memories? CXL? Well, there there's you know something that that intel proved with um pentium or i'm sorry with uh optane was that uh you've you've got to produce it in really high volume for it to be cost effective when you're when you're competing against nan flash and dram and uh they just weren't able to reach the kind of volumes that it took to drive the costs out of it. And that's, that's something that's going to, you know,

work against MRAM and resistive RAM and all those things. Yeah. I think software played a big part of that as well. Right. The fact that to really take advantage of what Optane could offer, like applications had to be written to be Optane aware to, to really utilize it the way it was designed to be utilized. And nobody did it. Intel made a pretty good stab at trying to make that transparent, but it wasn't quite all.

They tried hard. Yeah. They tried very hard. And, and it was, you know, kind of a swing and a miss, but, um, but, you know, I mean, great tech though. Yeah. Oh yeah. I, I just love the technology. The engineer side of me is just charmed by that. Um, the, the financial side of me looks at it and says, it just never could have worked. Right. Right. Ouch. Okay. So what's next on your list, Jim? Chiplets and UCIE. And chiplets are, okay, part of Moore's law, if you, okay, Moore's law was around a 1965 paper that he wrote, and it said, we're going to be able to get up to whatever it was, 16 kilobits of memory all in the same die. And then in 1975, he was asked to revisit that. And he said, yeah, it looks like, you know, three things are going on here. One of them is the die size keeps

growing. Another one is the size of the transistors on the die keeps shrinking. And a third one is we're using them more effectively. And he called that cleverness. And I always think that's pretty cool. But the first one is the one that we have a problem with that chiplets are approaching is that die sizes did keep increasing until around 2010. I think it was, maybe it was earlier than that. And then they leveled off. And that was when we started seeing, you know, clock speeds leveling off and core count increasing and all that kind of stuff was people were trying to find a way to get more into a certain size die when the only thing they could do is shrink the transistors. They couldn't increase the die size. And that was limited by the tools that are made to be used to make the semiconductors. They have what's called a maximum reticle size,

and they just don't handle anything any larger than that. It's, I guess that the cost would end up becoming prohibitive if, if they went larger than that. It's, I guess, that the cost would end up becoming prohibitive if they went larger than that. So the die sizes have stopped growing. And people are saying, well, how can we grow the die size? And one way of doing it is by moving to multiple chips to do the same as a single chip would do. And the FPGA manufacturers were the first to do that. I think it was Xilinx that was the first to do that. And they used chiplets. And then the processor manufacturers started doing that in the higher end. Intel and AMD processors, AMD was actually first. They've started using them too. And it looks like the whole industry is going to change from doing just big, big single chips to doing multiple somewhat smaller chips.

Now the interface you talked about, UIE, is that? UCIE. Universal Chiplet Interface Express. Yeah. Is that something that's going to be standardized? I mean, right now the chiplet interface is probably proprietary would be my guess. It is. Yeah. And, and because of its, its proprietary, then if AMD is buying a chip from somebody else to use as a chiplet, then it has to use an AMD proprietary interface, and then Intel can't use it. And so that supplier can't sell it anywhere but to AMD. What UCI does is it frees that up so that multiple companies, you know, including people who make their own chips like Google and NVIDIA,

companies like that, they ought to be able to all use a chip from somebody else. And where this really stands to help is in memory chips, which, you know, I always talk about memories. But memory chips... Are DRAMs going to be chiplet-based? Yeah. Yeah, they're probably going to be just enormous DRAM caches made as chiplets, where they'll be trading off the size of the cache versus how slow it is. Interesting. And in a way, HBM, high bandwidth memory, is kind of like a chiplet because it mounts very similarly to the things. It's just that it uses a different interface than UCIe. And so these guys are typically placed on a chip at the same layer, I guess. They're not like they're going 3D or anything like that, right?

They are going 3D. They are going 3D. Yeah, or 2.5D. I get a little bit confused about what's called 2.5D and what's called 3D. Okay, that's interesting. A half a dimension is a hard thing to wrap your head around. I work at AMD and I get confused by it. So I should say a lot.

Yeah, I forgot about that, Jason. You chime in about the chiplet use at AMD if you need to. Not on a public forum. Not without an NDA. You're not speaking on behalf of AMD here, I suspect. No, I am not. Okay, fine. I'm speaking on behalf of myself. Okay, so let me say one other thing about UCIe

that is kind of cool is that it's using CXL as the communication. What? You're The chip? Yeah. So it's, you know, two chips right next to each other, talking to each other, using this protocol that was developed actually so that you could have memory disaggregation

and maybe even have all of your memory in a box at the end of a cable. That's pretty impressive. Yeah. That's crazy. That means I could be potentially, yeah, no, I don't even want to think about it. Don't. I mean, I could have a whole system on a chip as if I can't already. And NAND, too, will be chiplet-based, you think? I'm skeptical myself because NAND is so slow

that there's not a speed advantage to coupling it that closely with the processor. And they already do 3D, so... Yeah, well, you know, and it's a different kind of 3D, though. You know, there's 3D packaging and there's 3D building, you know, the silicon in a 3D though, you know, there's 3D packaging and there's 3D building, you know, the silicon in a 3D way. And that's what NAND flash does is building silicon that way. I gotcha. Interesting. Yeah, this UCIE seems pretty impressive. Yeah, there were a lot of sessions on that. You know, I think

that it's new enough that a lot of people were attending the sessions just to say, Hey, I've heard of it, but I don't understand it. Tell me about it. Right. Right. Right. Huh. So what's next on your list of top items? Yeah. Yeah. No, I, and before the show you and I talked about this list, Ray. So yeah, I'm just kind of running through them. The next one is computational storage. And there's been a lot of talk and a lot of work in the Storage

Networking Industry Association, SNIA, to standardize the way that computational storage works. And what happened was people looked at SSDs and they said, gee, there's a ton of bandwidth internal to the SSD that I can't check. And there are a ton of smarts. Yeah. And what can I do to free up those smarts and free up that bandwidth to be used to offload tasks from the server? And the people have come up with these things that are programmable, general purpose things that conceivably they could do parts of database program execution. And then you could take that out that if you wanted to increase the speed at which you did your database processing, you just add smart SSDs to this thing. And, you know, if you had a hundred of them, you'd get a hundred times of performance that you'd get with just one. So it's interesting way to approach that. So, you know, there's been a lot of work going on, like I say, over the past

five years or so, it's Nia trying to standardize the protocol and everything with the idea that people would be using these as general purpose processors. But what seems to be happening instead is that it's entering the mainstream as compressed drives or drives that do video encoding, you know, that kind of thing. So they're dedicated function drives that are doing things that you probably wouldn't want your processor doing simply because of the fact that it's kind of a waste of resources. But it's not that you have the processor sending tasks to the SSD to do. Instead, it's just, you know, it's operating with the SSD like it's a normal SSD, and the SSD is doing the compression just as a way of saving space, reducing wear, and that kind of thing. But what was really cool was that IBM was there presenting at the Flash Memory Summit

about what to do about ransomware. And IBM has been a huge user of computational storage for compression for a number of years. And they- They didn't call it computational storage at the time. They just said their flash modules did compression. Yeah, yeah. They used to say that. But now they're saying they're acknowledging that it's computational storage. Right. But yeah, they looked at that.

And they looked at the fact that there was processing performance that wasn't being harnessed inside those things and put some great minds to the idea of taking advantage of that to solve problems with ransomware to actually look for patterns that were known to exist in ransomware and also to look for places where the disk's usage patterns were not the same as they had been over time. And, you know, just basically sniff out anything suspicious and report it back to the security software in the server. Interesting. So they're starting to characterize I.O. at the SSD level and try to understand when it's changing, I guess.

Yeah. And if, you know, where else, Ray, do they use characterization? Probably a lot of places other than just ransomware. And I guess that could be useful in other places. It's going to be interesting to see what AIML implications will come of this as well, right? Computational storage, can you actually have, if you've got a video surveillance system, like doing, you know, inferencing on facial recognition or something like that?

It'd be interesting to see. One of the computational storage companies, NGD, used to talk about that a lot. They've run into a funding problem, so I don't even know if they're still with us. But that is certainly something that they could do. But since you mentioned AI and SSDs, something that wasn't a topic, or at least I didn't see it as a topic this year, but I've seen it in other years, I think is fascinating is that is the use of very minimal AI functions to manage data placement within the SSD. Using AI? Yeah. And that's given me the idea that we're probably going to see AI pop up in a number of places that are just completely invisible, but that somebody finds out that they can use a simpler

algorithm or maybe get better performance out of cheaper hardware by shoving a little AI firmware into what would be a very mundane kind of a program otherwise. Yeah. We had a last, our, our last podcast was on ML perf, actually last before last second to the last. And they were talking about some edge IoT applications that they've been using. Yeah. It is, it is very interesting to see what they're doing there. Yeah. I wouldn't be at all surprised to hear about people writing ai firmware for 8-bit microcontrollers yeah int8 they do mind you it's there i mean you think about i mean you think

about this though like all the computing power that can be now thrust into a 2U machine, right? Right. Between just the CPUs, a GPU in there, now the network cards have DPUs, and just say you've got 24 slots on the front of that thing, and each one of those is a processor too. I mean, already in a 2U machine, you could have like thousands of cores in a 2U machine. Yeah. Yeah. Yeah. Yeah.

Yeah. Well, you know, someday we're going to have thousands of cores in a chip. Yeah. Yeah. So, you know, I don't know. Maybe NVIDIA already has that. Well, they have 1,000. They have 4,000 cores on their GPU, but it's, I would say it's like 4 chips.

It's not a core. I'll say it's an NPU core kind of thing. Yeah. Yeah. Yeah. It's a SIMD core, which doesn't count, right? All right. It's not an x86 core. Depends who you ask. All right. All right. I'll, I'll give up on that. Yeah. Just, just one more thing on the AI thing was that there was a speaker that I wasn't, I didn't tell you that I was going to talk about in this. Samit Gupta spoke in the last session, uh, as a, just a, how, what are we doing with AI at Google? Um, he's an ex IBM-er who then went to NVIDIA and then from NVIDIA over to Google,

um, very accomplished guy who just knows an awful lot about AI. And he said that Google has gotten to the point where they were doubling their performance every year. And they just didn't see that they could sustainably continue to do that. And so now they're looking to AI to be able to reduce the amount of hardware build-out that they need to do and still be able to increase the services the the services that they present to their customers

huh you know and he's for him a billion is a small number yeah we should all have that problem Yes. All right. Computational storage. Yeah. I had in-memory processing as the next one here. Should I move on to that? Go ahead. Yeah. That's something that's kind of fun because what a lot of people are doing in in-memory processing is neural networks, which, you know, what that is is that's just basically doing, what do you call it,

linear math, linear algebra, or, you know, processing arrays. Characterized processing of neural network. Yeah, you just do it inside of something that's organized like a memory chip. Yeah, yeah. Yeah, exactly. And these things are great for inference. it inside of something that's organized like a memory chip yeah yeah yeah exactly and these things are great for inference that is doing the recognition but for training they they haven't yet cracked the nut on how to do training on those and so they still do the training on gpus um but you know then that training gets moved over to the neural network. And because of the fact that neural networks are really low power, they're really, really cheap, but they're kind of slow.

That makes them really good for edge applications. And so there's a lot of that. But there also are, you know, that's a neural network kind of in-memory process. There are a lot of people, too, who are looking at putting a little bit of extra logic onto a conventional digital memory chip and using that as a little processing engine. It's the same thing as computational storage, but now it's down at the chip level instead of being at the SSD level. We have cars at the chip level. I don't know why we need another set of, I always had this struggle is why do we need another computational element in the IT environment here?

We've got cores up the kazoo on the CPU chip. We got cores up the kazoo on the GPU. And now we got cores up the kazoo on the DPU and we're putting cores on the SSDs. Now you want to put cores in the DRAM. Well, heck, if you don't have a core, you're just not it. So, so yeah, the deal here is, you know, everybody likes to talk about the memory wall. And that basically is the fact that you have to move data around so much that it becomes an important part of the power consumption of any data center. And if you can reduce the amount of motion that goes on, which computational storage does, and which in-memory processing will do, then you'll end up,

you know, this example that I use with the database, let's say that you loaded all of a database's information into a computational storage device. Or if it were a really small database, you could load it into a memory chip. And then the server would just say, now sort this way, now sort that way. And have it sorted all in memory or all at the storage level. Yeah, yeah. And the computational storage SSD would say, okay, give me a minute. It would come back to the server and say,

okay, I'm done. Which entry do you want out of this new sorted thing? Yeah, and you think about the applications too. I mean, that has applications where you've got like kind of like a sharded database. I mean, once again, talking about that 2U server. So if I've got 24 more ARM CPUs that may be like 4, 8, 16 core, that's actually a lot of processing power you can use to do some distributed database, distributed compute. There's all kinds of, I can see application-related pieces where you could use that.

Yeah. When I made that comment to the DPU guys a couple years back, they said it's all about the transfer speed. It's getting to be that the transfer speed is becoming part of the bottleneck here. Right. Getting data from point A to point B, if you can do it without having to go through the CPU, you're better served. Yeah. And then like the fact that you're just like if a if a package incoming from a DPU perspective, if packets incoming and this machine can't process it, have that like the DPU reroute it somewhere else. Right. You know, it's kind of like what, you know, a lot of the Pensando technology does is pretty cool when it comes down to if this machine can't process it, send it exactly to the machine where it can.

And now it's moving to DRAM, which is insane. Yeah, well, but there's another thing too, Ray. You're talking about getting the data from here to there. The whole reason why HBM, high bandwidth memory, is popular in GPUs is because of the fact that HBM can deliver a ton of data very quickly to the GPU. All you have to do is to stick it in the same package with the GPU and have it be tenths of a centimeter or tenths of a millimeter away from the processing chip. Interesting. I always thought there was a lot more logic to this HBM stuff than just being close. Yeah.

No, it's short signal lines. Yeah. Speed of light stuff is, you know, how do you get the signal across that little wire faster? Right. You make the wire shorter. You make the wire shorter. How do you drive faster from San Jose to San Francisco? You move to San Francisco. Or move to San Jose.

One of the two. Well, one of the two. Get a helicopter. Sounds like one of these old ideas that keeps coming back. Yeah. Probably so. The RFC 1925, the 12 the 12 networking truth truth number 11 every old idea will be proposed again with a different name and a different presentation regardless of

whether it works yes i i think i've heard that before all right so yeah but even you look back to the cray one and the reason why the cray one was that round shape was so that they could get the back plane to be shorter. Yeah, yeah. And all the wires had to be cut to exactly the same specification. Yeah, yeah. I've been there. I've done this stuff.

Don't tell me about it. Speed of light. Yep. Yeah, yeah. All right. What's next on your list, Jim? AI. Everybody was talking about AI.

I was in a session with a bunch of vendors, and IDC was talking about how AI is impacting storage. It was a quite lively discussion there. Oh, I'm sad that I missed it. Yeah. God, there was people from, well, gosh, there was Infinidat, Hammerspace, Pure Storage, a couple of consultants, I think HPE guy. And it was a pretty interesting discussion.

It turns out that, you know, data is getting bigger and needs to be moved from place to place. I don't think there's a segment that is not severely impacted by AI at this point. A segment of IT. I agree completely. Data center. I was at Data Center World a couple of months ago, and they were talking about basically the power consumption required to do large language model stuff it is insane yeah um and now everybody's trying to figure out how to rework data center architecture support that to to support the power requirements that are necessary

there's lots of discussion about you know the racks are typically configured i don't know for uh 10 kilowatts and each one of of these AI processors takes six or something like that. Whoa. Yeah. So you can put like one and a half or maybe two into a rack or something like that. The currents are, you know, like you said, 10 to 20 is pretty much what most data centers are running. Data centers that, you know, kind of some of the OCP model data centers of some of the hyperscalers are, are kind of in that 50 range.

We're already like kind of, kind of projecting that if you want to get basically kind of an AI loaded out rack, it's going to be about one 50 K per, per rack. Ouch. Yeah. that's a couple yeah well that okay i'm not really well versed in ai and my understanding is one of the beauties of ai is that where um more conventional methods might be able to look and analyze a handful of variables or dozens of variables and figure out which ones are important and then make decisions based on that,

that AI can look at hundreds of thousands of variables, millions of variables, and be able to decide what the trends are based on that a whole lot better. It's like a whole lot better. It's like a dimensionality issue. So, you know, typical pre-AI solutions could handle, you know, four, five, six-dimensional spaces fairly easily. But now with AI, it's n-dimensional.

I mean, it can have as many dimensions as you want. The LLM, Large Landing Models models now are hundreds of trillions of parameters. Not every one of those is a dimension, but it's certainly sizable. Yeah, but what that says, too, is that what you said about storage and what Jason was saying about the power and how much DRAM gets used in that and all that kind of stuff is probably very proportional to the size of the data set that you're analyzing. Well, everybody's looking at it, especially the chip manufacturers, who are people I'm very close to, and they're licking their chops. Yeah, yeah.

Well, we all are actually in IT business, quite frankly. Yeah, yeah. All right. What's next on your list? Automotive. We all are actually in IT business, quite frankly. Yeah, yeah. All right. What's next on your list? Automotive. And this was something that was kind of like off in its own separate corner, but still attracting a lot of attention was that it seems like the automobile guys are taking a data center approach to their automobiles.

That in the past, you've had different computing complexes that had no communication with each other. You had the engine and transmission that communicated with each other, but they didn't communicate with anything else in the entire automobile. And then you have your dashboard computer and that doesn't communicate with anything. And then you have your entertainment system and maybe a control. Yeah. And you've got your your safety system none of those talk to each other and uh there's an attempt going on to unify all of that into what they call zonal processing uh like different zones of the car and i think it's zone one zone two zone three from the front of the car to the back a local area network local area network on my car. If I don't already.

Oh, they already have it. They call it can. It's called the car area network. Oh God. Yeah. And it makes sense. Okay. One of the things that's been really important in automobiles is to get the weight down because that helps with fuel economy. Right. And one of the ways that you do that is by minimizing how many wires are in the wiring harness for your car. So instead of having wires go from the turn signal switch to the turn signals in all four corners of the car. Point to point kind of stuff. Yeah, you just have a multiplex cable that carries your turn signal data, plus it carries your brake light data, plus it carries your turn on the taillights because it's dark outside data and the headlights. And all of that ends up just being bits all in a single wire that runs the periphery of the car.

Interesting. Is Cat 5 going in your car? Well, it's copper. Actually, Cat5 would be a good thing because of the fact that... Or no, not Cat5. You do Cat6, right? You do Cat6 a year or something. No, fiber. You'd want to use fiber.

Fiber is lightweight compared to copper. I guess. But there's some problems with transformation of light to electronics and back again and stuff. Well, it has to be done, but it doesn't add weight. And it sells more chips. And so my client, they really like that. Okay. Well, that's good.

That's good. Yeah. Anything else? Yeah. Oh, not an automotive. Shall I move on to the next? Yeah, I think you should move on. Yeah.

So before we devolve. So something that I did see as a trend is that more and more SSD management is moving to the host. But this isn't something where people say, we're going to move that to the host like they did with the open channel SSD. But what they're doing instead is they're saying, well, how can we provide data from the host that's going to make it easier for the SSD to perform better? And, you know, yes, there is stuff like the open channel SSD where the server can give commands to the SSD saying, okay, this would be a good time to do garbage collection, which the trim command is a little bit of that. And that's been around for over a decade. But the things that people are really talking about now are zone namespaces, where the server does a better job of managing where things are put on the SSD. Key value storage is another one like that. And then there are streams. And the streams is a really good thing where basically different applications who have different kinds of IO streams,

whether they're serial or highly randomized or whatever, those are managed into different parts of the SSD. And the host is trying to create this sort of framework for being able to tell the SSD that this is stream X or stream Y, and I expect it to be sequential and that one to be random. Yeah, they're basically hints. And different interfaces have hooks in them to allow for that. So a lot of the groundwork

for that was done years ago. And now it's just a question of implementation and pulling it into the code. Yeah. I saw that the OCP guys were talking about flexible data placement and its impact on performance and write amplification and stuff like that. Yeah. Yeah. It does an awful lot of good stuff. You know, the write amplification means that you don. Yeah, yeah, it does an awful lot of good stuff. You know, the write amplification means that you don't have to have disks that have just, you know, huge drive rates per day. Yeah, yeah.

All right, one more thing, and I think it's time to go. Yeah, you know, emerging memories. There were a lot of people who were talking about things other than flash memory at the flash memory summit. I was really impressed with those Neo guys, but you're telling me that they don't have prototypes yet. Yeah. Their, their design right now has been, you know, and there's,

it's not to discount the ability of computer modeling. When I got into the chip business, it was, people were laying out chips by hand and it was not uncommon to go through three revs of a chip before you had one that really functioned. And now everything works the first time. So, you know, it's just amazing. All through modeling.

We used to have to do ion patches to chips and stuff like that. Yeah, now they can do full FPGA simulations of very advanced CPU models and things like that. Oh, okay. I wasn't aware that they could do that. It sounds like that would just be wretchedly expensive and it would take a warehouse full of FPGAs. But, you know, you get to a point where, you know, the cost of redoing the chip is going to be astronomical, right?

That's true as far as i understand a mask set in an advanced process is well over 10 million dollars you know this is this is the things that you actually use in the plant to make the chip yeah they're kind of like the photographic negatives so if i want to make a ray computer chip i i need 10 million in minimum just to fire something up? Let alone get to that point. Yeah. Yeah, but this is if you're using the most advanced processes. I can go one level down and be only $5 million. Something.

Well, yeah, I kind of like that. There aren't very many people who use those advanced process technologies. They do tend to all be, you know, CPU, GPU manufacturers, and maybe some of the cell phone guys too. Right, right, right, right, right. All right. Well, this has been great. Jason, any last questions for Jim before we close? No, I mean, I did, you know, it's, uh, I wish I was at flash memory summit this year. It sounds like it was actually an amazing, uh, uh, an amazing show. And, uh, uh, unfortunately I,

I was unable to make it with a prior prior, uh, engagements that I had, but, uh, it sounds like there was a lot to, uh, to digest and cover. It's hard to cover by only a single person, quite frankly. Yeah. So much going on, you know? Yeah, yeah, really. All right, Jim, anything you'd like to say to our listening audience before we close?

You know, I just wanted to mention that Coughlin Associates and Objective Analysis, my firm's Objective Analysis, have just recently published a report on emerging memory technologies. So if any of your listeners would like to understand both the economics and the technologies of magnetic RAM, MRAM, resistive RAM, which is re-RAM, ferroelectric memory, FRAM, or phase change memory, or other new memory technologies. You know, it's all in there. So, you know, just visit the objective analysis website. You'll find it. Sounds like a great, I'll put a link in the podcast post for that. Okay.

Thank you very much for doing that. Well, this has been great, Jim. Thank you again for being on our show today. Oh, and thanks for inviting me. It's always a delight to be on there. Okay. That's it for now. Bye, Jim. Bye, Jason. Bye, Ray. for inviting me. It's always a delight to be on there. Okay. That's it for now. Bye, Jim.

Bye, Jason. Bye, Ray. Bye, Ray. Bye, Jason. Until next time. Next time, we will talk to the most system storage technology person. Any questions you want us to ask, please let us know. And if you enjoy our podcast, tell your friends about it.

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