In The Arena by TechArena - Disruptive Chiplet Innovation Delivers the Next Wave of Data Center Performance with Palo Alto Electron’s Jawad Nasrullah

Episode Date: May 3, 2024

TechArena host Allyson Klein chats with Palo Alto Electron CEO Jawad Nasrullah about his vision for an open chiplet economy, the semiconductor manufacturing hurdles standing in the way of broad chiplet market delivery, and how he plans to play a role in shaping this next evolution of the semiconductor landscape.

Welcome to the Tech Arena, featuring authentic discussions between tech's leading innovators and our host, Allison Klein. Now, let's step into the arena. Welcome to the Tech Arena. My name is Alison Klein. We're coming to you from OCP Lisbon this week, and I'm so delighted to be joined by Jawad Nazrullah, CEO of Palo Alto Electron. Welcome to the program, Jawad. Thank you for having me. I was really excited to have you on. I'm very intrigued to learn more about you and Paolo Alto Electron, as well as what you're talking about at the conference. Since you haven't been on the program before, why don't you go ahead and just introduce yourself, talk about why you founded your company.

Sure. So my background is in chip design, And in particular, I have spent quite a bit of my career designings was slowing down. And we realized one thing, which was that since we will be up against this, this certification limit, figure out some other ways of addressing the architectural improvement and performance improvement. And hence we had this idea to break the die into smaller die called chiplets. That was my previous company where we developed some of the foundational technology for chiplets. And now what we do primarily is develop chips and modules for our customers that are mostly, if I perform well. Now, chiplets, obviously, many of the large players have embraced chiplets.

They have chiplets integrated into their designs. There's also traction with industry standards for chiplets that makes a really interesting opportunity for market innovation. What is driving, beyond Moore's Law, what is driving chiplet requirements today? And where do you think we are in this evolution of the industry? We are quite early. So we're still in a situation where we keep on thinking about what if francesca technology single chip would deliver what it used to do with dynard scaling and recall where it's not happening right right so

we have slowly like you said are developing electrical interface standards. That thing is quite apparent in the form of UCIE from Intel and then a bunch of wires from ODSA. That basically solves one of the many challenges, which is how do two guys talk to each other? Maybe they are placed side by side. Maybe they are put right on top of each other. Maybe they are placed side by side, maybe they are put right on top of each other. So now we have some traction in that particular area and we are seeing that within one company designs are being broken into multiple dies and they are being connected with some type of a die-to-day. The next thing which is in the works at the moment is how do you take

components from different vendors and design a system with? There are some complexities because the system integration at the substrate level has some similarity with silicon design and some similarity with PCB design. So there is a convergence, and the convergence is a form of design tool and design automation in the work. So I think now there's enough critical mass. People are seeing that with this particular approach of multi-die integration, you can continue providing performance improvement that customers really care for and move forward. At the end of the day, what goes on their pan? That's it. They want more performance.

And just by packing these dies maybe side by side or on top of each other in a given volume we are able to provide more functionality there are still challenges though when you think about the challenges are they in the manufacturing process, in the ability to stack chips? I mean, there's some pretty advanced manufacturing requirements to be able to deliver these types of configurations in market. Or is it even just standards on form factors and different things that need to be figured out? So the number one problem remains in

manufacturing. It's a bit unfortunate that we are very advanced in manufacturing

transistors. When it comes to integration, we keep on looking for robot solutions,

which means that you will not have advanced manufacturing capability there. Now it's apparent, especially with these AI use cases, that that's the only way of getting performance. There is a lot of development going on

in areas with the advanced packaging for these. An example is a silicon interposer point on at the moment in AI chips. And it has limited in one size. It really can go beyond a number which is maybe probably 500 square millimetres and that is the square micron in that range and that one is about four radicals. Muchis wants it two times more or three times more. Sure. Right. to think more of the things that we've been doing. Sure. The other challenge is, even with the technology,

we're really seeing product coming from one manufacturer in the market. So others are still in the development of the X-ray. That's a big problem. Sure. For this particular field. Most manufacturers. for this particular field. It was manufactured. So we are hoping that U.S. CHIPS Act solves some of that, because it's a dynamic issue.

And then the second year is what you refer to as EDA and the design for LEPRO. Almost secondary, because we have solved those issues once before. Sure. Okay. Now let's get back to Palo Alto Electron. As this market emerges and continues to grow, how do you see Palo Alto Electron playing a role in driving leadership in this space? Okay. So one thing we did,

at Neon, we recognized that, you know, it's a big field, and our expertise in a certain area. We are not a manufacturing company. We are small, so what we did is we formed the alliance. That alliance is now referred to as Chiplet.ua. So some small startups and some bigger companies, some manufacturers, some established ones.

So we decided to collaborate with each other. And the idea of collaboration was, okay, while the market is developing, I need to move in our ecosystem. We pass on business to each other and we learn how business to each other. And we learn how to support each other. Nice.

For example, in Silicon Valley, we have a assembler, ProMan. So we develop a design kit, assembly design kit to work with their process that we can potentially give to our customers. So my book about Power to Electron, in the long run, that the open, separate economy becomes a thing. And then, you know, we are part of that economy. But short of that, we help bring folks together and work with each other and basically get to the next level. That's fantastic.

You know, I think that it goes without saying that there is incredible demand for increased performance in microprocessors right now. Generative AI has brought in a new curve in terms of demand that we've never seen before in the microprocessor industry. How much pressure is on chiplets to help solve this? And how do you see the next one to two years evolving in the open chiplet economy? So chiplets in the open support economy have one issue at the moment, which is it's not open as of today. Okay, so OCP is basically the thought to bear of leading the effort in that direction.

So in the last three, four years, we've gotten to the point where we have the leadership and bunch of wire, die to die, and that basically spurred other activity. I love it. We are now trying to address these issues. One issue is how the design exchange happens between different chiplets, different vendors.

We have an activity here called Chipboard Design Exchange Markup Language. That basically sets the foundation of design automation for the casual data. Our CBXML standard was adopted by JEDEC, and it's being worked on at the next level. So we at OCP really want to identify these issues that are making this thing difficult to open up. But we brought it to a point with something like the separate US alliance and there are a few others.

But they can interoperate among different companies, and they are capable to work together and build. I can't wait to see how this evolves. I founded the tech arena the week that the UCI specs came out, and I've been talking about it ever since, fascinated with chiplets and what the industry is going to do once we solve some of those advanced manufacturing challenges. Jawad, I'm sure that we've piqued folks' interest in learning more about Palo Alto Electron and getting engaged with your team. Where can I send listeners to engage with you and continue the conversation?

You can find us at followaltoelectron.com. Send me an email at doout at followaltoelectron.com. You can learn about chiplet.us at chiplet.ul. Fantastic. Thanks so much for your time today. It was a real pleasure. Great. Thanks so much for your time today. It was a real pleasure. Great. Thanks so much. Thanks for joining the Tech Arena.

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