Semiconductor Insiders - Podcast EP338: How Thermo Fisher Scientific Helps Advanced Semiconductor Development with Dr. Mohan Iyer

Episode Date: April 3, 2026

Daniel is joined by Dr. Mohan Iyer, who serves as the vice president and general manager of the Semiconductor Business Unit at Thermo Fisher Scientific, a global leader in providing reference metrology, defect characterization, and localization equipment. These advanced systems are essential for driving innovation, accelerating… Read More

Hello, my name is Daniel Neni, founder of SemaiWiki, the Open Forum for Semiconductor Professionals. Welcome to the Semiconductor Insiders podcast series. My guest today is Dr. Mohan Ayer, Vice President and General Manager of the Semiconductor Business Unit at Thermo Fisher. Mohan has over 27 years of experience in the semiconductor industry, specializing in semiconductor equipment and process control. Welcome to the podcast, Mohan. Thank you, Daniel.

It's great to be here speaking to your audience today and look forward to having a good discussion. So first let me ask, what brought you to Thermo Fisher? Yeah, for that, let me just tell you a little bit about Thermo Fisher. Thermo Fisher is the world leader serving science, and our mission is to help our customers make the world healthier, cleaner, and safer. So we have a broad portfolio serving our customers across a variety of verticals from life sciences and diagnostics to biopharma and semiconductors, of course. So in semiconductors, we are a critical part of the ecosystem, helping our customers find and fix defects, and enabling them to accelerate their development and ramp yield.

And we do this by finding electrical faults and doing defect localization through preparing samples using our dual beam portfolio and then with high-resolution imaging and elemental analysis with the TEM. Now the TEM is really the ultimate reference tool in the FAB and almost all process metrology tools use that as a reference when developing the processes. So we help our customers find buried structures and do defect analysis at an atomic scale. scale. And the data we provide is what we call the ground truth data. And this is what our customers rely on. And this is across a broad spectrum of customers that is traditional semiconductor, fab customers, as well as the fabulous people. The equipment manufacturers, design houses, testing labs, etc. So pretty much everybody who serves the semiconductor ecosystem from a fault localization isolation, defectivity and measurement perspective is our customer. So now coming back to, you know, how did I end up at Thermo Fisher?

My background is an electron microscopy and material science, and I work in a variety of roles with electron microscopes and serving the semiconductor industry, both on the fab side as well as with equipment suppliers. So after 27 years, this is the culmination of my journey, I think, in terms of being at a place where we make the best electron microscopes and help our customers solve critical problems. Great. Yeah, thanks for that. So what are some of the challenges that 3D stacking architectures help semiconductor manufacturers overcome? What benefits does the technology present and, you know, why is it such a breakthrough? Right. Previously, everything used to be planar. And the challenges with planar was there was only so many structures that you can put within the area that you have. And as it became more challenging, things got really tightly packed. People started exploring the third dimension to build structures vertically to overcome some of the two-de limitations. So with the 3D stacking, you get a higher. performance. So you're able to, through packaging, stack dyes, you shorten the interconnect

distances, and the 3D architecture increases the data transfer speeds, which are all critical for AI. There's also the power aspect. So you want to have better power efficiency, and you do that with shorter interconnects in the 3D structures, which reduces the power consumption. And it addresses is one of the industry's biggest challenges, in my view. You also have improvements to yield and cost optimization. You have large single dyes where the manufacturers can stack smaller, high-yield shiplets. And this improves the overall manufacturing efficiency

while lowering cost. And finally, the 3D architecture allows a whole new level of system architectures. So you go from a transistor level to more of a system and a packaging level. And it gives greater architectural flexibility. So as you get this level of complexity, as you get the improvements in performance, you also have challenges that start emerging. And that's where we come in.

So we help our customers localize, reveal and characterize defects that helps them protect yield and avoid delays from a time to market perspective. And how are increasing data center and AI-related workloads pushing semiconductor manufacturers to 3D analysis to detect chip defects earlier? Yeah. So the high-performance AI chips require increased defect sensitivity. So you have greater transistor density. You have more subtle defects that limit performance, which previously might not have been critical and might have been more of a nuisance defect, that now become critical.

And early analysis is important to identify these defects before packaging and deployment. So that's critical. There are hidden failure modes with 3D architectures. and many of the defects that you were previously more surface-oriented are now buried beneath the wafer surface, and your traditional 2D inspection techniques are not able to detect these subsurface, voids, delamination, or misalignments. And then you have tighter yield requirements for high-value chips. Now, as the size of these chips gets larger, you have, these are very high cost devices.

So even a few defects can scrap the whole ship. And so the cost of these defects goes up tremendously. And you really need to have early detection to protect your yields and reduce your cost. There's also the thermal and power density risks, because the AI workloads acquire higher power densities, which amplifies the impact of these defects. And 3D analysis enables earlier detection

so that you can find and fix these things faster. And ultimately what you're trying to do is to really shorten your product cycles and get to a faster ramp. Okay, so how does earlier defect detection translate into higher three? throughput and more reliable chips at scale then? Yeah, it is critical to improve the cycles of learning.

So as you develop, you want to find and fix issues as quickly as possible so that you can do your development fast and then ramp faster. So accelerating the root cause analysis allows you to have quicker process adjustments, which is critical. Also, it increasingly. increases the final product reliability. So early defect detection, especially of latent defects, prevents field failures.

So something that you find early on in your process that may or may not be critical now, could become critical five years from now. So that is really important. And then cost is always a factor. And with the high cost of these chips, you want to make sure that you maximize the number of functional chips per wafer. So the tolerance is in the industry of shifting from parts per million to parts per billion.

And manufacturers really need to identify these defects quickly and accurately. And earlier detection really reduces the likelihood of field failures, inconsistent performance, and early life reliability problems at the data centers, et cetera. Right. So from a manufacturing standpoint, how does automated 3D analysis in the FAB workflow impact cycle time and yield ramp and overall process control? So acceleration of cycle time is critical for, is through inline feedback. Typically what happens is the Waifer would go from the FAB to the lab. And it takes anywhere from a few hours to a few days to even a few weeks before that data comes back to.

to the fab and the changes can be made. Now, by getting the data quicker is critical for our manufacturers to find and fix these issues. So that's where the in-line workflow really comes into play. It accelerates the cycles of learning. It accelerates the cycle time and the time to decision-making. It accelerates the yield by doing this. The speed of the yield ramp, especially when you're introducing new nodes. goes up tremendously because you now have the ability to find these defects and do the root cause

analysis and shorten your cycles of learning. There is improvement through statistical process control. These by implementing 3D processes in line, you can implement SPC models and SPC charts, which allows you to find and detect excursions and find and fix them quickly. Also, automated workflows reduces human variability. So a lot of the work in the lab is primarily manual. So by moving things closer to the fab, you're actually reducing human variability by introducing automation and reducing yield loss. Okay, I think I get it. Can you walk us through how automated 3D reconstruction and 3D metrology work at a high level?

you know, what does it capture, what data does it capture and how are the insights used to produce more reliable and higher efficiency chips? Sure. So there's a number of steps here. First is the high resolution 3D data acquisition. The way that works is we have dual beam systems that sequentially mill an image nanoscale cross sections automatically. And we capture these high-resolution images and reconstruct these 3D data sets of varied structures, such as interconnects, DSVs, memory channel holes, gate all-round features, etc. Then we're able to then quantitatively extract metrology information from these structures. So our software converts reconstructed volumes into measurable parameters, so critical dimensions such as, TSV width and height and packaging and the through stack channel whole diameters in memory can be measured. And we also have the ability to do virtual slice metrology. So pretty much we can take sections through these 3D packages and get any sort of volumetric measurements that might be necessary. We're also able to look at these

data sets and find defect, such as buried voids, delaminations, discontinuities, etc., which might be invisible in traditional inspection techniques. We're able to use automated workflows to reduce manual intervention and enable consistent, repeatable analysis, and integrate this into the FAB data systems that support faster yield learning and tighter statistical process control. And all of this drives reliability and efficiency at scale. So the structural variability and latent defects are detected early, and the 3D tools actually help our manufacturers improve yield, reduce crap,

and deliver high reliability chips, which is critical for AI and advanced computing applications. So final question. Do you consider automated 3D analysis a huge step forward? in the defect analysis landscape? I mean, what can this mean for the future of chip design? You know, that's such a set up question. The answer is yes, of course, right?

I mean, as things get more in the third dimension, as you have more 3D structures, there is a fundamental shift in going from a 2D to a 3D volumetric information. 3D automated analysis moves defect inspection beyond the surface level imaging. It enables full structural visibility and enables our manufacturers to really understand complex device geometries. Full automation also provides for like scalable output, which is needed to meet demand increases, reduce operating expenses, and workflow productivity. It also enables proactive versus reactive defect management. So rather than waiting for diagnosing failures,

after electrical test or field returns, 3D analysis allows manufacturers to do earlier identification of risks that they might face later on. And it moves the defect analysis into a more predictive yield accelerating regime. We also have the ability to support the transition to advanced architecture. So with gate all around transistors, backside power delivery, 3D stack A. With all of these developments, automated 3D analysis becomes really essential and critical. And you can characterize structures that are no longer accessible with traditional 2D techniques. And all of this accelerates design optimization and reduces risk in generation of the next node. So really critical for manufacturers, especially with all the shrink that is happening in the structures, the complexity that is increasing.

The need to see the unseen at an atomic level is even more critical today. So we help our customers have these insights into their devices and help them accelerate a ramp and achieve field faster and be able to transition to manufacturing full management. production quicker. Great discussion. Thank you, Mahan. Looking forward to having you back on a different topic. Looking forward to it. Thank you so much. That concludes our podcast. Thank you all for listening and have a great day.