SemiWiki.com - Podcast EP277: How Arteris Flexgen Smart NOC IP Democratizes Advanced Chip Design with Rick Bye

Episode Date: March 7, 2025

Dan is joined by Rick Bye, director of product management and marketing at Arteris with responsibility for the FlexNoC family of non-coherent Network-on-Chip IP products. Rick joined Arteris from Arm where he was a senior product manager in the Client Line of Business, responsible for a demonstration SoC and compression IP. … Read More

Hello, my name is Daniel Nenny, founder of SemiWiki, the open forum for semiconductor professionals. Welcome to the Semiconductor Insiders podcast series. My guest today is Rick Bye, Director of Product Management and Marketing at Arteris. He's responsible for the FlexNoC family of non-coherent network on chip IP products. Rick joined Arteris from ARM where he was a senior product manager in the client line business responsible for a demonstration SOC and compression IP. Welcome to the podcast Rick. Hi Dan, good to be here. So Rick can

you first tell us how you got started in the semiconductor industry? Oh, yeah, as a kid growing up in the UK, I was fascinated, by the way, consumer electronics and computing devices were rapidly shrinking into much more user friendly form factors. So as a result, I decided I wanted to be part of that revolution. At university, I interned at UK Defense Electronics Company. There I really enjoyed using CAD systems and the tools running on them to design complex systems on gate arrays. All that got me motivated to get into

semiconductor design which I did at TI to begin. It wasn't long before I got more interested in the commercial side of the business. As a result, I transitioned from engineering into product management and marketing. That's a good story. And what brought you to Arteris? After I experienced a number of semiconductor vendors, big and small, joining Arm in 22 was my first time working for an IP provider rather than an IP user.

At Arm, I worked with developers of flagship mobile phone SoCs for top-of-the-line smartphones. There I saw that the interconnect, the network on chip IP that tied all the IP blocks on the SoC together, was critical to both the PPA and the time to market for these finished SoCs. When the opportunity arose to join our terrace, I jumped at it because it was clear that SoC designers needed alternatives to the folly of designing their own interconnects. The time was right for the inventor of the SOC, our terrace, to capitalize on the rapid growth in the quantity and complexity of SOC designs.

So we've heard about several exciting NOC inventions from our terrace on previous podcast episodes. Can you tell us what's new from our terrorists this year? Yeah. What I want to talk to you today about, Dan, is something that we think is truly revolutionary. Our FlaxGen smart network on ship IP with NOC generation capability built right into the IP itself, to enable the delivery of unprecedented productivity gains, efficiency savings, and quality of results across SOCs

in pretty much any market segment. Our FlexGen Smart Knock IP builds our silicon proven and physically aware FlexKnock5 IP. It optimizes RTL output with a smart automation approach that minimizes the need for manual topology adjustments by over 90%. That sounds great and much needed with the explosive growth and complexity. Tell me more about the impact this technology has on the SoC design process.

By leveraging machine learning based AI, FlexGen reduces the manual setup and automates non-coherent NOC IP topologies within minutes or hours where previously they may have taken days or weeks for manual implementation. It eliminates the need for expert and scarce NOC design engineers to intervene in the process. Instead, design engineers can now spend more time exploring multiple iterations to enable them to truly optimize their knock implementations. Interesting. But surely an automatically generated smart knock implementation cannot achieve the same power performance

and area and quality of results as an expert knock designer with years of experience, right? Actually, we're seeing just the opposite with our first FlexGen users getting very positive power performance in area, PPA gains compared to a manual approach. We gave some of our closest customers early access to pre-release versions of FlexGen.

In addition to a 10x productivity boost, they're typically reporting total wire length reductions as much as 30%, all while lowering latency by more than 10%, all compared to manual implementations of the same NCC design done by their expert FlexNOC engineers. Okay, yeah, I can see how lowering latency has a direct impact on performance, but help me understand how reducing wire length helps power performance in area.

This becomes more and more important as you get to advance deep sub-micron technologies like five nanometer, three nanometer, two nanometer, etc. Here, shorter wire lengths can have significantly lower propagation delay. That means it takes less time for the data to get across the chip to where it's going.

It also reduces the need for pipelining stages, which in turn increases performance because the data is getting there quicker and lowers latency. In addition to needing lower or fewer pipelining stages, shorter wires also have lower capacitance. Both of these factors result in lower power consumption. Finally, of course, having shorter wires also have lower capacitance. So both of these factors result in lower power consumption. And finally, of course, having shorter wires means you need less silicon area. Together, all of these things add up to better PPA.

Got it. So FlexGen will enable SOC designers to complete NOC implementations faster without necessarily needing to use NOC design experts while achieving PPA that is as good as an expert manual design. But tell us more about the time savings and what that really means. Yeah the bigger benefit is the speed in which designers can iterate their knock implementations. Now an expert engineer can experiment with ten different implementations to

find which one's the best, all in the time it would have taken them to previously complete one. The way before they may have just come up with one implementation and ran with it, made it work, come heck or high water. Now they can really mess around and figure out what's the best way to get this done. But even more importantly, it's almost inevitable that any SOC project will have last minute spec changes, which, no matter how minor,

almost always impact the knock requiring a redesign. Now this redesign can be completed in minutes or hours where previously it may have delayed the overall SOC design schedule by days or weeks. That's great. Yeah, FlexGen can reduce schedule risk by almost eliminating the impact of last minute spec changes.

Are there other FlexGen benefits that you could tell us about? Yeah, absolutely. Because of the tight coupling between the NOC implementation and overall system performance, FlexGen can enable SOC architects to not only explore different NOC implementations,

but also to rapidly explore a wide range of different SoC architectures and configurations. This capability could be incredibly useful, both companies exploring options for new standard products, but also to enable design services companies to provide quotes to a multitude of potential customers looking for help with their SoC designs, FlexGen could allow these design services companies to provide more accurate quotes for the designs they're bidding on and provide them more quickly, both potentially increasing revenue and profits for those design services companies. And what markets will benefit from this? One of the great things about FlexGen Smart Knock IP is that

it benefits almost the entire range of SoC designs. But the high-end SoCs that are enabling the proliferation of AI-driven applications in the data center and automotive don't just have a single knock, they may have five, 20, or even more knocks on a chip. So they need the productivity and PPA benefits delivered by FlexGen to implement their multitude of NOCs.

At the other end of the spectrum, designers of less complex SoCs for applications like IoT and industrial control may be making the transition from using shared buses in their SoCs to using a network on chip for the very first time. These first time NOC designers will really appreciate the availability of smart knock IP that doesn't require them to recruit expert knock engineering talent to complete their designs.

So what factors drove our terrorists to invest in this technology? Next gen came about as a result of the convergence of engineering prowess combined with a clear market need. Iterus has over 20 years of experience in knock IP design. We've supported over 200 customers who've started more than 800 separate designs. Our engineers were able to combine all of this experience for the latest AI heuristics and machine learning technology to allow us to truly democratize network on ship implementation

for anyone building SoCs. This supports the trend of OEMs in many markets are designing their own SoCs, wherever it serves their business needs, for example, to increase product differentiation and capability, all while lowering manufacturing and procurement costs. There's an interesting article that Synopsys wrote about this

back in 2022 where they say, quote, OEMs such as smartphone and automotive companies are increasingly embracing vertical integration in their design practices including implementing their own SOCs, end quote. We're now seeing this not only in those markets, but in the data center, on the desktop, and in a variety of consumer electronics.

This trend towards virtual integration is significantly increasing the number of SoC design starts, and that's putting significant pressure on the availability of engineering resources to execute those designs. The automation delivered by FlexGen reduces the resource requirements for SoC design and lowers risk and reduces time to market, making it practical for many more OEMs to now design their own SoCs.

You're saying that FlexGen uses AI to design AI chips. Right. Yeah. I kind of like the circular nature of flexgen. It uses AI to make it easier for our customers to design SOCs that will further fuel the proliferation of AI applications. Although I do wonder if I should be scared and sort of

excited about the thought of AI designing AI. Yeah, well it was only a matter of time. So where do you see this technology going in the future? Well, at Atterus, we continuously innovate our products and that includes this latest product release. The market's changing rapidly. Our expert team of engineers will continue to add new features and support new standards

and requirements from our customers, as well as the semiconductor ecosystem. just as we have done for years with FlexNOC, NCore, our coherent NOC IP, and all our other products. However, in addition to innovation from our terrace, I also believe that FlexGen can facilitate greater innovation from our customers. I hope the capabilities we're delivering in our revolutionary Smart Knock IP will convince those SOC designers who currently wrestle with manual in-house interconnect approaches that they would be better off licensing our Smart Knock IP.

Instead of consuming valuable engineering resources on DIY interconnect design, they could redeploy those engineers to develop truly differentiating capabilities that will bring value to the products and the customers using them. With the availability of robust and silicon proven smart knock IP, SoC designers can avoid the risk of a poor knock implementation that could unexpectedly limit performance for some critical use cases. I mean, why invest millions in licensing state of the-the-art processor IP that consumes tons of expensive silicon real estate in the latest process nodes, if all that CPU performance and silicon performance is going to be throttled to a fraction of its true capability by a suboptimal

knock design? FlexGen Smart Knock IP eliminates that risk. Yeah, that's excellent. So final question, where can people go to learn more about our Terrace and FlexGen? Well, thanks Dan. Well, people can visit ourterrace.com

or find more information about us on social media channels. We're also gonna be at many industry events. So come by and say hi to us in person. We'd love to meet you. And of course, we'd love to work with you. Excellent conversation, Rick. Thank you for your time. Yeah, thanks Dan. It was great talking to you and look forward to catching up with you again later. That concludes our podcast. Thank you all for listening and have a great day. Music