Storage Developer Conference - #95: Tunneling through Barriers

Episode Date: May 13, 2019

Hello, everybody. Mark Carlson here, SNEA Technical Council Co-Chair. Welcome to the SDC Podcast. Every week, the SDC Podcast presents important technical topics to the storage developer community. Each episode is hand-selected by the SNEA Technical Council from the presentations at our annual Storage Developer Conference. The link to the slides is available in the show notes at snea.org slash podcasts. You are listening to SDC Podcast, Episode 95. Thank you very much. It is a great honor to be here. I give a similar, can everybody hear me? Can everybody understand my accent? So I gave a similar talk at the Flash Memory Summit a few weeks ago to a small but enthusiastic crowd and I'm pleased to see there's more people here but maybe the size times the enthusiasm might be the same but let's hope that I can instill

the same kind of enthusiasm in this subject that I have for it. I've been boring my family for many years on this topic, so you are now my next victims on it. It's a very interesting area. As an engineer scientist type, I always like going down to the fundamentals. What is it that this whole industry is based on? And this is one of the key parts of it, tunneling. I only have one slide on quantum mechanical tunneling, and it's a pictorial slide. But I want to stress from that slide what the result is.

What result do we use when it comes to flash memory? And also spin transfer tech, STT, MRAM as well. So the concept of tunneling came about in the late 1920s. And it was the first successful application of the new quantum mechanics at the time. And I'll go into that as well. But before I do that, I want to give you a small anecdote. When I come from, if we go for a walk in the mountains, we get to the top of the mountain,

we usually find a pile of stones, and it's called a cairn. And then we take a stone ourselves and we place that stone on top of that mound of stones. And it's basically in honor to those who have gone before. So this industry is based on thousands and thousands of people working, being innovative, using creative ways of building products based on fundamental technologies. So this is one of them. And I hope to show you with this golden thread of tunneling how it all fits together for our industry.

Let me go to the next one. What is the link between, for example, alpha particle decay, 3D NAND, and SDTM RAM? It's basically tunneling. So if you look, I think this is the one, yeah. If you look here, this is a paper that came out in Nature in 1928, Gurney and Condon,

and it was the first successful application of the new quantum mechanics at the time to explain alpha particle decay. So it's basically the alpha particle stuck in a nucleus and the ability to tunnel out of that nucleus and be measured outside the nucleus. It solved many, many problems, many unusual problems. And then if you look here, I have to quote this actually, much has been written of the explosive violence with which the alpha particles is hurled from its place in the nucleus. But from the process

pictured above, one would rather say that the alpha particle slips away almost unnoticed. So it tunnels its way through that barrier. Then you look at 3D NAND. So these are pictures of, or a diagram that I drew in the actual cross section of a device.

And you can see here, we've got it's basically a field effect transistor. And you've got the channel, you've got this funny looking dielectric stack. And you've got the channel, you've got this funny-looking dielectric stack, and you've got the gate. Here is the tunnel dielectric. This is where the electrons tunnel through into a charge reservoir and out of the charge reservoir.

So I'll go into more of that, the evolution of that structure. And then STTM RAM. Looks a bit complicated. We've got these magnetic materials, but we've got a tunnel barrier. A very, very thin layer of magnesium oxide. And again, it's all about electrons tunneling through that thin barrier and doing their stuff. We'll go into that as well. But at the foundation of the whole thing

is this tunnel mechanism. So I want to tell you, at the Flash Memory Summit, I was walking around some of the booths, and one of the booths was from one of the major manufacturers of NAND flash. And one of the engineers there told me that they had invented 3D NAND with charge trap as the mechanism to hold the charge. And there's a big battle going on between, as you know it, some on one side using charge trap and some on the other side using floating gate to store charge.

Now, I had to tell him that this actually goes back, this storm in a teacup goes back to the 1960s, and I'll show you where that came from. But floating gate versus charge trap in a non-volatile memory goes all the way back to 1967, and I'll show you. Okay, so that's the lead in. So this is what I'm going to talk about. What is tunneling? So that one slide.

Then tunneling in solid-state memories. Why it's important, where it arises. Damage. By tunneling, we create damage. So, for example, we create endurance limitations in NAND flash. That's the damage from the tunneling mechanism. The golden thread of tunneling. So this is then a few slides on the history. What happened when?

Who did what? So this is then a few slides on the history, what happened when, who did what. So this was quite interesting. This is me going into the Computer History Museum archives and looking at the original Fairchild lab notebooks and finding the original experiments done on tunneling in silicon devices. And from those scribbles, it's amazing that this whole industry took off, right? And then also a bit about STTM RAM. It uses a tunneling mechanism, but it's an unusual one. And there's a conundrum associated with it. I'll show you.

Tunneling engineering, there are certain things we can do in design, circuit design, but also in the architecture of a device to improve the endurance, to reduce the damage of tunneling. Some conclusions, and then tunneling in Silicon Valley. I'll show you some of those lab notebooks or extracts from, and then acknowledgments. Okay, what is that? This is the single slide, the single slide on the quantum mechanics of tunneling. So remember, the whole thing is this Schrodinger's equation, and you've got this wave function and so on. And it turns out the amplitude of the wave function

is the square root, basically, of the probability of finding the particle at any place in time, any place in space. So you can see here, for example, this would be a barrier. Here's a barrier on this side of the barrier, classically forbidden to a particle, right? On this side of the barrier, classically forbidden to a particle, right? On this side of the barrier,

it would be constrained within that region. And then we have the, you can imagine a bucket. So we put all these marbles into a bucket, and then we leave them overnight. And then the next morning, we find that one of the marbles has got out. So not knowing quantum mechanics, you'd think, oh, somebody must have taken it out and placed it outside.

But in quantum mechanics, if the particle is small enough and so on, then there is a probability. The probability is given by this function, the square of the amplitude of the wave function. There's a probability of finding it outside in the forbidden region. So what would happen if we had a barrier here? And then here's the total energy of the particle. And then this is the potential energy diagram of what the particle has to endure.

So you can see here if the width of that barrier is sufficiently small, there's a probability that it will find itself on the other side. So that's it. So this book actually here, 1940 book, Elementary Quantum Mechanics by Gurney the same guy that did the alpha particle decay is one that I got for free about 30 years ago at Phillips they were giving out these books trying to make more space in the library for other books and I wrote my

name in a list for this one and I got it so I had it for many many years and I wrote my name in a list for this one, and I got it. So I had it for many, many years, and then finally I decided to plod my way through it. And then it paid off. I started understanding it again. So this is a, and it's pictorial. It's a way of understanding something pictorially, which is very powerful, for me anyway. And he writes here, we shall not expect to find in quantum mechanics

anything so definite as the sharp dividing surface. So that's the key. So for electrons, they can tunnel through barriers, and that's the foundation of NAND flash. So tunneling in solar state memories. 2D NAND, charge tunneling to and from a floating gate. There were some who tried to use charge trap in the 2000s, but they had problems. So most, all 2D NAND products are floating gate based. That's the reservoir where the charge is stored. 3D NAND, charge tunneling to and from silicon nitride or floating gate. So there was a

resurgence of silicon nitride as being the reservoir for storing that charge. There's also classic Sonos, charge tunneling to and from a silicon nitride. Sonos goes all the way back to the 1960s. And then STTM, and I'll talk more about that, tunneling between magnetic metals. But for these, for flash, for 2D NAND, 3D NAND, and classic Sonos, the basic components, there are three basic components. When you boil it all down, you need a field effect device. You need a transistor, some kind of device that can be used as the electrometer for measuring the absence or presence of that stored charge. So that's the field effect device.

Then you need the charge reservoir. You need to store it somewhere between the gate and the channel of the transistor. That's the reservoir, nitride or floating gate, silicon nitride or floating gate. And then you need a mechanism to move the charge in and out of that reservoir. That's the tunnel mechanism. Those are, in all cases here except for SCTM, those are the basic components of what we're dealing with. And then all the innovation comes around how to build architectures based on those three components. How do you build the

field effect device? How do you build the charge reservoir? What's the optimized version of that and so on? And then the tunnel mechanism. How do you optimize the tunnel mechanism so we get maximum endurance? And it goes all the way to total cost of ownership of an SSD. If it only has a certain number of times you can fill and empty the total memory and you have to throw it away and spend more money to have another one, that's where that endurance comes in. How to engineer the tunnel mechanism to maximize endurance so those three things

remember those because once we start talking about these various types of memory you can see the three mechanisms that work for example, here's 2D NAND this is some cross-sections I got from Dick James when he was at Chipworks and then at Tech Insights. When you see something like these cross-sections, you see the

engineering that has gone into this. So this was 128 gigabits, 60 nanometer 2D NAND from Intel Micron. So you see here, here's the string. Here's the string in the 2D NAND. And here's the last two bits. And you can see here the control gate,

the floating gate, the tunnel oxide, and the dielectrics between the gates. So we've got the MOS. We've got the field effect device. Here's our field effect device. Here's the channel. Then we've got the main gate. And then we've got the stuff between the main gate and the channel. Here's the reservoir for storing the charge. And here's the tunnel oxide using

the mechanism for that programming arrays through tunneling of the electrons to and from the floating gate. And this sort of over many, many years, sort of distilled out to be about 7 nanometers to optimize the endurance. Okay, so that's the 2D NAND. And as we all know, that is having problems in scaling below a half pitch of about 50 nanometers.

So then the manufacturers saw this coming, so they started working on the 3D versions. But again, 3D versions have the same three mechanisms, structures involved, the foundations. Here's 3D NAND. Looks complicated, but again, here's some beautiful work from Chipworks, Tech Insights, cross sections, you can see the strings going up and down. Here's the, this turns out to be the contact to the source at the other side. It's an amazing technology when you look at it. When this first came out in 2000, the first one in 2007,

I said, the expert, this will never work, right? So what I say now is, it will eventually not work, right? Because they'll hit a sufficiently tall structure that they can't do it anymore. But so look here, look here. So the cross-section's here. It looks complicated, but it's very straightforward if you look at it. Here's the MOS again. So we've got the field effect device.

The field effect device, here's the gate, this metal, this tungsten metal here with tinitride. Then we've got this dielectric of the field effect device, which includes the reservoir for charge storage, the silicon nitride. Then we have a tunnel dielectric. And it's a complicated looking thing with silicon oxide and silicon nitride to optimize endurance. So a lot of engineering has gone into that stack of dielectrics to optimize endurance and retention. And then we have the channel. So we have the field effect device,

we have the reservoir for storing charge, and we have that tunnel structure to get the charge in and out of the reservoir. That's all it is. The rest is the engineering of putting that together in a way that leads to reduced cost per bit. But that's basically what it is. So the tunnel mechanism right here, you can imagine alpha particle decay right here. Then I did some work in the

2000s, in the late 2000s, trying to build a device. So I built a device that could boost endurance, for example. So I built a thin film could boost endurance, for example. So I built a thin-film transistor. This is a cross-section of the thin-film transistor, which has two gates. It has a polysilicon gate on one side, then the channel here. You can imagine the channel coming out of the page. And then you've got another gate on the other side. And the key thing is here.

Here is the field effect device again. One device here, another device here. This one optimized for charge storage. This one optimized for passing a current independent of that charge storage. What this did was it allowed you to optimize the ONO, the tunnel oxide and the nitride and the blocking oxide independently of disturbs, past disturbs, which turns out to be important because then you can boost the endurance by orders of magnitude. So this is something I worked on about 10

years ago. But again, the field effect device, the reservoir, and the tunnel mechanism. Okay, so the three things are still there. Again, put in a different way, an architecturally different way. Then we come to this unusual beast, STTM RAM. So I joined this company about a year ago, and the background to this was they had come up with a piece of IP, a design piece. This is not a plug. This is supposed to be the reason I joined. I can explain it like this. They had come up with a piece of designed

IP that would fit with anybody else's process that would boost the endurance by orders of magnitude. This was the claim. Then when I saw how the thing would operate then I started to understand this stuff too at a sort of fairly fundamental level not at a complex level

but this was a piece of design IP that could boost the endurance by orders of magnitude in a non-volatile memory this is highly unusual, I'd never seen this before because usually to boost endurance and balance retention, you go into the fab, you change materials, you change structure, and you get maybe half an order of magnitude improvement. This was highly unusual. And then we got silicon and then it showed itself to be true. So this is quite exciting too. I'll talk more about this. But anyway, the structure here is magnetic materials, magnetic metals, separated by a thin tunnel oxide.

And then with the magnetization vector of this top layer being switchable, the bottom layer being a reference kind of material. And it turns out the electrons, when they tunnel, the resistance of the stack depends on the relative directions of these magnetization vectors. So this is a low-resistance state, and this is a high-resistance state.

So the electrons find it easier to tunnel through when both of these are aligned. Now for switching it turns out you need quite a high current to switch that. You get this filtering of the spins of the electrons tunneling through. If you get enough of them they will flip this magnetization vector. So you can flip between a high resistance to a low resistance state but the problem is I'll tell you more about that

it's unique in solid state memory, it's a stochastic process, sometimes with the same bit with the same current, the same voltage there's a probability it may not switch and that's the fundamental difference between this with the same current, the same voltage, there's a probability it may not switch. And that's the fundamental difference

between this and all other solid-state memory. So I'll talk about that too. And how it relates to tunneling and tunneling damage and so on. Is everybody following this? Getting enthusiastic about the three? If there's anything to take away from this is those three things. If you're a systems engineer and you boil it down to the fundamental foundation, it's the three mechanisms.

The field effect device, the reservoir for charge storage, and the tunnel mechanism. And each of those had to be invented along the way, right? So we'll go into that in a minute. Who invented it? When was it invented, right? They had to be in place before the next step could be taken, right? Okay, so there's also tunneling damage. So when we tunnel through a barrier, it creates damage. And the rule of thumb is tunneling creates more damage in thicker tunnel dielectrics.

And what is thick and what is thin. So thick and thin, about three and a half nanometers is regarded as thick in the 2D NAND and 3D NAND. And less than that is thin for classic Sonos and STTM RAM. Because if you look at STTM RAM by itself, if you take care of the stochastic nature, you can get about a million to a hundred million cycles.

If you look at 2D and 3D NAND, depending on the SLC, MLC, whatever, you can get anywhere between a few thousand to maybe 100,000 cycles. Classic Sonos, much thinner dielectrics, you can get up to a million cycles or more. So what is the damage and what are the consequences? So charge trapping is one of them. These electrons are tunneling through, back and forth across a thin oxide. They get trapped. What does that do? That changes the threshold voltage of that field effect device.

It's no longer the fresh device that came out of the fab. It's got electrons stuck in the oxide or stuck somewhere in an interface trap that changes the threshold voltage of the device, and you can't get rid of it. So what it does is, if you look at the population of threshold voltages within a population of bits, they start sort of widening, and then it gets more difficult to tell them apart

by a zero and a one. And you also get shifts in the current voltage characteristics. It might be more difficult to have current flow through a device that's supposed to be off and then it gets again more difficult to sense the state of the device. So charge trapping is one. Stress induced damage. You get things, damage induced in the oxide, breaking of bonds that result in more trapping and so on. So you get this sort of what they call stress-induced leakage current. You get these traps in the oxide and chars can hop out. They're supposed to be stored in the oxide.

And you get wear out and breakdown. If you take it too far, the thing just breaks down. You get a short between one of the floating gate or whatever and the substrate. So those are things that over the years, I'll show you the history, over the years have been engineered around. So this is again the interesting thing. We come as a group of innovators up against the problem,

and we find solutions which are not usually in your particular area of expertise but require others to come in from other parts of the industry to fix. And, of course, as an engineer, you think, no, no, my fix this. But then what you find is this industry, the fixing of these problems requires cross-functionality, and that brings people together. So there's a social aspect to all of this as well, bringing people together to solve problems, right? And these problems become

stressful because there's a momentum in this industry to make things work and it becomes, the time to a fix becomes very short. So you need to be on the ball all the time. But it's cross functionality, that's the key. So you need to be on the ball all the time. But cross-functionality, that's the key. So, the golden thread of tunneling. So some of these things you probably won't be able to read, but SW gave me a good piece of advice. In the final document I will include these blown up versions in an appendix. So if anybody is interested, they can go after it themselves.

They can bore their families about the, you know, oh, did you know that Kang and Atala came up with the first silicon-based trans? You know, all this kind of stuff, right? You can see eyes glazing over at the dinner table. But, you know, so I will blow up these, put them in an appendix, and you can do your own research. It's a really, really interesting area. It's a golden thread.

Tunneling is the golden thread that connects all of this together. From fundamental physics to technological innovation. So look, here's the fundamental physics. So here's that diagram, this sort of leaky barrier, getting across a leaky barrier. Then one of the first applications, so we had the alpha particle decay, but then Fowler and Nordheim came up with the use of tunneling

to explain how electrons would get out of a metal in a very, very high electric field. So that was called Fowler-Nordheim tunneling. So Fowler is interesting because he was the son-in-law of Lord Rutherford. And he was at the same institute in Cambridge, and they were sort of working together. And Nordheim was a postdoc, I think, and he worked with von Neumann. Von Neumann,

he and von Neumann came up with one particular aspect of quantum mechanics, the operator formalism. So these people got around. But this, this turned out to be of fundamental importance to the tunnel mechanism that was used in silicon devices. FN tunneling they call it. So many people will drop the names. FN tunneling, phytonautic tunneling. But the people who were involved

it was back in the 1920s working on a different problem. But the physics then was used in the 1960s. Okay? Then, a lot of things happened, but then the MOSFET, the field effect device, the silicon-based field effect device, there were rumblings about field effect behavior from the late 1920s, actually. Lilienfeld, an immigrant from Lvov in what is now Ukraine. But that, and then Shockley tried to patent the field effect, but he couldn't patent it because Lilienfeld had already patented it,

the main concept. Then it was Kahn and Atala who came up with the first silicon-based field effect transistor. And then things took off. Then you had, it was a small step, Khan and C, Simon and C, working on Fowler-Nordheim effects in a silicon-based device that could use the Fowler-Nordheim effect to store charge in a reservoir, a floating gate, if you like. So that was floating gate 1967.

But charge trap was also 1967 to 1968. We had Wegener on a variable threshold transistor using nitride as a storage mechanism. So you can see all the, you know, this goes all the way back to the 1960s, right? Then you had a MONOS memory element, basically a Sonos device. So you had a gate, metal gate in that case, oxide, nitride, oxide, silicon. And they found, oh, we could change the threshold voltage of that device by storing charge, tunneling charge into and out of that nitride. And then Lenzlinger, remember that name, because I'll come back to that,

Lenzlinger and Snow, describing the mechanism of phylonordheim for what Simon C. and Kang had been doing. This is at Fairchild. And then Lenslinger also did a lot of work on the foundations of that, and I'll show you. That's the guy, Martin Lenslinger. That's the guy whose lab notebook

I was presented with by a lady with white gloves at the archives of the Computer History Museum. And it was quite an emotional moment when you think how far it's come, right? Then you see Froman Benczowski and Lenzlinger again, again in Fairchild, knowing the history. It's quite interesting to see what, Benczkowski eventually went to Intel I think Lenzlinger stayed at Fairchild and here's Harari, Eli Harari

with the first E-squared prom that used tunnelling for in and out of the floating gate, big device single device big device and Eli Harari had done a lot of work in the 1970s on his PhD, post-doc actually, no, PhD in Princeton on electron tunneling in thin oxides.

So he knew what the damage was in that mechanism. And then in the late 80s, I'll show you, he came up with, oh, how can we mitigate against that damage using design and system techniques? The controller. Then, Masuoka, Toshiba, flash. First flash device, 1984. And you can see where it's going, right? So, NAND flash, 1988.

The 1988 is the first NAND flash that used tunneling for both program and erase. They tried the year before to use a hot electron injection mechanism, but it never got anywhere. So this was really the first NAND flash. This one is the mother of all that came after it. Okay?

And then multi-bit. So Harari, Eli Harari and team working on, let's store packets or sub-populations of electrons in the floating gate so that we can tell one, we have one population versus another population, so we get multi-bit within the field effect device. And then system flash. How to control, how to take charge of, how to count how many times a cell has been written and erased, knowing that it will wear out eventually.

So that control and monitoring of behavior and shifting data around within the flash is basically the controller, the system that created. And so NAND flash, those concepts led to the industry that we have here. And then limits of 2D NAND. Those concepts led to the industry that we have here. And then limits of 2D NAND. In about 2016, it's coming to an end after all the engineering. So then a lot of work was being done knowing that 2D NAND was going to eventually have problems. a lot of work was done then on thin film-based devices. Thin film because you can stack them on top of the substrate, one on top of the other, a 3D architecture.

And the thin film transistor is nothing special. It's just the field tech device, but with a thin layer instead of the whole bulk substrate as the channel, if you like. So then I had the good fortune of being involved in matrix semiconductor from about 2000 to 2004. And we created the world's first 3D TFT Sonos memory cell. This was in the VLSI symposium in 2003. And this was, I remember taking that wafer out of the fab, sticking it under the in the measurement facility and seeing the current voltage curves.

And then that was the start of boring my family to death about how beautiful these curves were and how this was going to take over the industry and everything. So it was an amazing thing. But anyway, you see that a field effect, an unusual field effect device with ONO,

charge trapping, and the ability to stack. So that was 3D. Then we went to Macronix. Macronix built, published the first TFT Sonos NAND string, right? And they showed the behavior there. And then I started a company to build a dual gate. I spoke about it before. Thin film transistor Sonos device that could boost the endurance by orders of magnitude and still be non-volatile.

So this was the rise of monolithic 3D flash, but that's not the type they eventually took off. But elements are there, the thin film transistor nature and the storage in in a reservoir and the field effect device. So then came BICOS scalable, the BICS architecture from Toshiba. Toshiba were always, always seemed to be the ones breaking new ground when it came to the architecture and what eventually became a manufacturable process. So here, BitCost Scalable. This is 2007, the first attempt at making this structure, which is basically the mother of all 3D NAND now.

Now, not far behind was Samsung. Samsung came up with their version. They called it terabit cell array transistor, which is now VNAND or whatever, but similar kind of structure, but different process flow, maybe more manufacturable and better for lower resistance paths and so on. And I think this one eventually is winning out.

I'm not sure about the actual differences anymore in manufacturing. But this was the rise of vertical channel 3D NAND. So 2007, 2009, Toshiba, Samsung. And there it is. So this was, again, Chipworks Tech Insights. Dick James sent me these, and you can see the structure here. But again, look how complicated it looks. But it's not.

It's the field effect device in a ring, but here's the gate, here's the reservoir for charge storage, here's the channel, here's the field effect device, here's the tunnel dielectrics, and so on. Yeah? Something that is really impressive about that picture that I think you should mention is that those little dots are individual molecules or atoms.

Yeah, here, silicon atoms here. Isn't that beautiful? And the other thing that's interesting about, thanks, Jim. The other thing that's interesting about this is all other NAND, all other flash and so on, was built in the substrate. So the substrate is monocrystalline silicon. This was then polycrystalline. This is polycrystalline silicon. And when you go from one to the other, you limit the amount of, you limit the mobility of the electrons in that

material. So the amount of current out of this is much lower than in the substrate, if you build it in the monocrystalline substrate. So one of the battles that the challenges that the 3D9 folks have to deal with is to increase capacities, they have to lengthen the string. So the string is one big, long resistor. So you can imagine a big, long resistor combined with much lower mobilities of the electrons in that resistor lead to much lower currents. So they have to deal with sensing that current.

Okay? But yeah, an amazing structure. Now, a few words on STTM. STTM has a stochastic nature about it. It looks complicated, but if I take a bit and I program and erase it with the same voltage each time, now and again it won't program and it won't erase. That has a probability associated

with it. That probability is given by this stochastic top hat. This is the right error rate. So the probability that it will not switch as a function of the voltage across it, positive and negative. Very low voltages, probability that it won't switch is high. It won't switch.

To make sure that it switches, you have to apply a relatively high voltage, a relatively high tunnel current. So at the product level, you need to hit it hard. You need to apply a long pulse or many pulses or whatever. So what that does is a single cell, you may miss that it doesn't switch. But at a product level, you have to hit it harder to make sure that the population has a low right error rate. So what that means is that you limit the endurance

because the tunnel current is high. So that's the limitation in STTM RAM. And what the company spin transfer has is a design technique that can mitigate against that. So I won't go into too much detail on that, but that's what attracted me to that it was an engineering of the tunnel mechanism so tunneling engineering

this is a very interesting area NAND flash increases electrical bits per cell they want to increase the capacity, increase the density of the material but what they do is for SLC, MLC, TLC, and QLC, the endurance goes down because you've got less space, electrical space between the populations of threshold voltages within that field effect device.

And they can't go too thin with the tunnel oxide because of disturbed mechanisms. So they will be limited at about, per cell, about 100,000 cycles. That led me to this kind of structure here, which can get to millions of endurance cycles. So you engineer it. Given the constraints of the three, you know, the field effect, the reservoir, and the tunnel mechanism, you can engineer around that and boost the endurance with an architectural change. And then SDT-MRAM endurance, boosted by design techniques.

I won't go into that if anybody's interested. But basically, six orders of magnitude gain, allowing for a potential for SRAM and DRAM replacement if it can be made manufacturable. But it's all tunneling engineering. So conclusions. A long and illustrious history, the foundation of many, many solid-state memory technologies. It creates damage and must be monitored, and you can engineer around those.

And so that engineering and cross functionality, design can deal with it. In NAND flash, design and the control of the system deals with it, right, hides that damage, right, up to a point. Architectural structures of how you put the elements together in the process, that can boost the endurance as well.

Continues to grow in importance, 3D NAND evolution, other 3D NAND solid-state memory approaches and STT-MRAM. Tunneling in Silicon Valley, this was Fairchild 1967-68. This was from Martin Lenslinger's notebook, November the 1st, 1967. This is a Fowler-Nordheim plot of, you know, tunneling through a thin oxide out of time, okay? So this is his lab notebook. Here he says, conclusion, the current through the oxide is limited by, oops, the current through the oxide is limited by the tunnel injection and this was a memo he wrote to some

turned out to be quite famous guys in the end, Andy Grove, Gordon Moore and some other ones you might remember here, this is January 25th 1968, just a few months before they went off and some of those went off and started Intel, I wonder what was going through their minds at that time. Was it tunnel mechanisms or was it this new company that they were developing? Okay, acknowledgements. Eli Harari, I've spoken to him on many occasions. Very interesting insights into the history of the whole thing.

Dick James, I've mentioned. Malcolm Longyear, University of Cambridge, to make sure that what I present here on the quantum mechanical front is not complete nonsense. Thomas Boone from spin transfer technologies for that cross section I showed you. The Schustek Center in Fremont from the Computer History Museum and the Cambridge University Press for allowing me to show those those diagrams from that book. OK, that's it. Thanks for listening. If you have questions about the material

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