Tech Over Tea - The Open Source FPGA No One Is Talking About | Tristan Ross

Episode Date: July 3, 2026

Today we have Tristan Ross back on the show, last time he was here to talk about NixOS but this time he's now back to talk about his open source FPGA.==========Support The Channel==========► Patreon: https://www.patreon.com/brodierobertson► Paypal: https://www.paypal.me/BrodieRobertsonVideo► Amazon USA: https://amzn.to/3d5gykF► Other Methods: https://cointr.ee/brodierobertson==========Guest Links==========Aegis Repo: https://github.com/Midstall/aegis==========Support The Show==========► Patreon: https://www.patreon.com/brodierobertson► Paypal: https://www.paypal.me/BrodieRobertsonVideo► Amazon USA: https://amzn.to/3d5gykF► Other Methods: https://cointr.ee/brodierobertson=========Video Platforms==========🎥 YouTube: https://www.youtube.com/channel/UCBq5p-xOla8xhnrbhu8AIAg=========Audio Release=========🎵 RSS: https://anchor.fm/s/149fd51c/podcast/rss🎵 Apple Podcast:https://podcasts.apple.com/us/podcast/tech-over-tea/id1501727953🎵 Spotify: https://open.spotify.com/show/3IfFpfzlLo7OPsEnl4gbdM🎵 Google Podcast: https://www.google.com/podcasts?feed=aHR0cHM6Ly9hbmNob3IuZm0vcy8xNDlmZDUxYy9wb2RjYXN0L3Jzcw==🎵 Anchor: https://anchor.fm/tech-over-tea==========Social Media==========🎤 Discord:https://discord.gg/PkMRVn9🐦 Twitter: https://twitter.com/TechOverTeaShow📷 Instagram: https://www.instagram.com/techovertea/🌐 Mastodon:https://mastodon.social/web/accounts/1093345==========Credits==========🎨 Channel Art:All my art has was created by Supercozmanhttps://twitter.com/Supercozmanhttps://www.instagram.com/supercozman_draws/DISCLOSURE: Wherever possible I use referral links, which means if you click one of the links in this video or description and make a purchase we may receive a small commission or other compensation.

Good morning, good day, and good evening. I'm as always your host, Brody Robertson. And today we have a returning guest. Last time you're on to confuse us about NixOS. Now you're here to confuse us about FPGAs. Hopefully, hopefully I come out of the other side of this one knowing a bit more than I did with the Nix episode because that was...

That was a little rough, but it was a fun episode nonetheless. So for anyone who doesn't know who you are, introduce yourself, and then we'll get into the main topic. Hi, I'm Tristan. Tristan Ross, also known as a computer guy, and I do a lot of Nix things around tool chains. My day job is dealing with effectively supply chain security, you know, CVEs, all that mess. And then when I'm not doing that mess, I'm usually working with hardware kind of things, like designing an FPGA. So, I guess,

where do you want to start with this? Do you want to introduce the project you're working on, or start from, like, the very ground there? Feel free to go to direct you want to. I think a good start would be kind of like the background and, like, what made me make an FPGA, because no one just, like, decides,

I'm going to build an FPGA. It's not like a thing you just build in your backyard because you're effectively designing silicon. It's reprogrammable. And so I've had FPJs for a while. They're really cool. One of the things you can do with them is basically just design any sort of reprogramable circuit onto it.

You can design things like CPUs, You can design graphics chips, you can do signal processing stuff. Effectively, an FPJ has a few thousand to possibly tens of thousands of logic cells that represent basic binary operations, you know, and or XOR. Sometimes you have, like, you have MUX configuration stuff. They have a little bit of some fanciergear things like SIRDS, which are called serializer DCR Lizes, but extraordinary to assert as, because that's faster to just say. You also have DSPs, which are signal processors.

You also have, like, B-Ram, which is block RAM. Typically, you have things like DDR, which is in everyone's computers nowadays. You have S-Ram, which is a little bit less common, but still is used today. but B-RAM is kind of just it is just a slab of memory on some tile of the ship and it's there

very simple the problem I was running into was every FPGA is proprietary meaning the entire Silicon's proprietary the tools around is proprietary thankfully

over the past however long people have created open source tool chains like Yosis and Next PNR So those were what again Let me Yosis Yos Yos Yos Y-Y-S-Y-S

and Next P-N-R Okay And next P-N-R Okay cool And basically Because of all these proprietaryness You need to buy the license You need to

have very specific environments that you can't be using this on virtual Linux without going through great lengths of hatching the software to get it to work correctly, kind of like what we had to do on NixOS. So people have created Yosis and XPNR which are just gone through a lot of reverse engineering to figure out what is this actually doing and how we can do this without the proprietoriness. The kind of problem that I ran into with this is because you're still relying on the proprietaryness of hardware,

some of these reverse engineering efforts haven't gone to great enough lengths to create a suitable replacement that is better or comparable to the existing tool chains that are proprietary. So sometimes you might rent little issues like on lattice ECP5, like the J tag, which is just a little five pin zero connection. There's an ICCLE standard. Basically just think of just like trying to do GDB, but it's for hardware. You can hook it up to a CPU and be like, I want to see what's going on the CPU. And on lattice is, for whatever reason, is not deterministic. If you try using it, because routing is not deterministic, because it is constraint-solving very NP hard problems,

you don't always get the same routing every single time, that routing change can change the timing to the J-tag. meaning you cannot predict what the J-tag signaling is going to be and so then you always get garbage the weird thing is this is not a problem on the proprietary EDA which seems weird

why the open source tools have this problem and not the proprietary one they must be doing some magic just be a reverse engineering issue where they don't know exactly again I'm any comment I make here is going to be from position of I don't know much about hardware. I would assume because they have to reverse engineer it, whatever they're doing with the proprietary version is not entirely clear.

So the result you have with the open source implementation does not align with that. Maybe I'm off, off base here. Yeah. I'm not really clear on the exact like behavior of the problem, because it's still very weird, but it's been documented online of, like, ACP5's JAG tag of being just not that well to work with. And so I was like, well, I'm having all these problems with the open source stuff. So I'm going to create an open source SPJ, and I basically had a very simple idea to get started,

which was just design a lot. and a LUT is a lookup table, which is the actual logic cell of an FPGA. Which, if you look at how it works, it's just think of a truth table that you can reprogram. So you have a few inputs, you have a few outputs, and then there's just a bunch of muxes that control when certain values or when the Lut is configured in a way, it can then do and or X or stuff like that. And then from there I started scaling up, and then I added things like CLB, which is a configurational logic block,

which has lots inside of it, added things like mux trees, which then allowed you to kind of carry signals around a little bit more in complex ways. And it started building into this, into an actual FPGA and when I looked at it I was like

oh this is actually like starting to become usable still no hardware yet but at least I was able to get a simulator inside of Rust and run a effectively a blinky which is like the hardware version of a hello world

basically just light goes on light goes off that just repeats on until there's no electricity which, yeah. And then I was like, well, this is pretty cool that I have now an FPGA

that I have designed and it's designed in a way of being called parameterized, meaning a lot of hardware is very specifically designed, so you write all of your varilog, which varilog is the, language of hardware. Basically, it is a representation of wires and stuff. It's kind of a functional

programming kind of way of doing it. That's kind of the way to represent hardware. And what I was using was something called Road, R-O-H-D, RAP-N open hardware development. It is a Dart framework. is start like what Flutter uses and what Google's been using for a few things. Okay. And yeah, so this is a thing Intel made. They've been working on it for like five years now. And so I basically have a way of being able to expand my FPGA by just changing a number. Because FPGAs are, and Silicon tradition, or usually are grid laid out.

you have a grid. So like on a CPU, a grid would, your grid would contain all your cores of your actual CPU. On FPJ, your unit of compute is the logic cells. So I was laying down all the logic cells in a grid.

And then if I want more, I just say the grid is now this much bigger or this much smaller, which is very declarative. So at this stage, everything was being done in a simulator. Yes, so I was able to simulate, well, yes and no.

So I had a Rust simulator that would take the description, effectively a descriptor file that I had emitted out during the generation time of the varilog and stuff like that, because there's a DART program that I wrote that just, what you used to generate all the files for actually gain the silicon manufactured, describes every minute detail for simulation and for actually like, you know, creating a program that you would load on to the FPJ. And so at least got enough for able to do a Blinky. And I was able to start to do Nix builds of just building and getting a GDS file,

which GDS files basically is kind of like the... G-code, which is like this 3D printer format, but think of that, but for silicon. So it describes, this is exactly what happened, like what to put on every single layer of the silicon, and how to like manage the substrate and all that. It's very complicated format. It takes literally an entire day for my desktop to process all the routing, every test, every check to make sure. this thing will not explode or fail to manufacture. Okay.

Was there more you wanted to say with that story, or could we jump back maybe a little bit before things started? Where does one even begin to, like, learn how to approach this problem? Like designing hard work or designing an FDA? Yeah, like, well, I, both of these, right? Like, I, I, this is an area that I've not even considered looking at. I don't know what resources are available.

I don't know where you even begin. Yeah, so since a lot of this information is kind of just esoteric because hardware usually is that way. I was kind of like, well, I can't really find good, well, I did find a blog. post that kind of was like, here is how to design an FPGA, in quotes, but using just big icy chips. So like, you know, a big dip chip on breadboards. And I was like, cool. Now, I kind of have to translate that into dark code, which done gets translated over into Verilog.

And so that's kind of what I was able to do. I had Claude helped me a little bit there, but like, I still was following the same principles. Everything was like, you know, the way the industry does it, which is normal, grid-based, Lut4 kind of style, silica. So, okay, you have this thing that takes an intent. higher data build. Where do you go from

there? You've designed the FPGA. What happens now? Now, so right now I'm doing a little bit of like the last stage before I get this chip manufactured, which is like all the verification stuff, making sure like everything works. So, you know,

I'm throwing into something called I'm converting it over to, a format called Spice, which is a netlist format. Netlists are complicated. They are a way of basically describing circuits. And Spice is a common one that's existed for forever now, and you just throw your device file into a Spice simulator, and you're simulating hardware then.

and so I'm working on trying to verify will this chip work or will it just completely break itself if I throw it over to being manufactured but once I do know it is actually going to work which I am finding that out pretty soon here it just takes forever to iterate

because it takes literally an entire day of an entire 16 to 24 hours to just process all this stuff. Right, so like a typical software example would be, let's say you are developing the Linux kernel and you're building the entire thing on a netbook. And every time you want to check a change, you've got to recompile the entire kernel.

Yes, but this is more extreme because I'm doing this on, you know, and 120 core Amper Ultra desktop with half a terabyte of RAM Okay, so it's like Right

So it's a powerful machine This takes forever Yeah, even on Like if you're trying to do this Not on an arm system Like if you try doing this on like Horizon or a thread riper or Epic Or literally anything

You're waiting at least Six hours and like from I can gather like bigger designs like my design is quite small in comparison to the rest of industry if you have something that's like on the scale of like xylinks which is the biggest FPJ company they're probably spending a few months

just getting this processed and it's probably done on a cluster so many times more compute than my single desktop here and they're still waiting a insane amount of time because these are NP hard problems you have the door to door salesman problem or just

find or like the neighbor finding problem where it's like you can't find where to put the thing because the next thing needs to know where the other things are at for anyone who's maybe we should for anyone who might not be um suffering in a new background or

tech background are NP hard just brief overview of that because we've used that her a few times maybe this you know now I just realized trying to explain what NP hard is actually a relatively annoying thing to do as well

yeah NP hard is hard to describe was it like NNP represent two statistical things in computer science. I don't remember what they are. There has been a ton of like academia behind this over the past probably 50 years now. So I recommend anyone who doesn't understand it. Please look into that if you really want to dig into this.

And it's... TLDR, it's really, really difficult. That's what you need to know, I guess. Yeah, it is, like I was saying, the door-to-door salesman problem is just, like, finding, where is the most available space? And so you can't find available space until you start putting stuff down,

which means this is doing thousands of iterations, which each iteration takes probably 10 to 20 minutes, and so it just gets exponentially longer as you scale up. So as you're doing this testing, what are the kind of things you're looking for that can go wrong? So the very low-hanging fruit ones are DRC failures, so DRC being designable checks. So that's stuff like, oh no, you're shoving five volts against each,

two 5-volt signals against each other, and now you have magic smoke. That is a very easy one. Other ones is like, oh, no, this trace is two microns not wide enough. Just need to make this trace a little bit thicker. Okay, yeah, right. Okay. I'm guessing if the trace is too thin, then the signal is not able to pass through it correctly? Um, more like, you know,

there's different like gauges of wire. It's kind of like that, but instead of being like millimeter or centimetre wide, this is microns wide. Or even sometimes nanometers wide.

Okay, so if it's too thin, you could burn the trace and then basically kill it. Yeah. You don't want to send too, and you don't want to send too much power down a thin trace, or you are going have problems.

Okay. Okay, that makes sense. What are some of the more, I guess, complicated problems you can find? Um, more like the antenna problem, which is as you have noise, or rather,

as you have signaling going through a chip, that creates a bit of electromagnetic interference, that you try to clock things higher, which then, naturally, energy wants to kind of

just go wherever, and if you have enough of it, it will emit enough that you can then pick up the electromagnetic interference, and then get a wireless signal, which, by definition, is an antenna. So,

like, I have a piece of wire here, by definition, this is an antenna. Yeah. So there is a lot of fancy math that happens and it checks to see whether or not you've not accidentally created an antenna. Right. So you could accidentally have... You could have electronic interference jumping between traces rather than just following where it's supposed to go. different layers, sometimes it's trying to get the stuff to actually use the right routing so that it doesn't accidentally create an antenna and then just like

there is at least a command that happens that the tooling provides that just repairs antennas it's literally called repair antennas and it goes through and it's like if this is an antenna it's no longer an antenna there's a lot of math of how it figures that out it's very complicated people made this happen and it makes it not a problem okay I guess that makes your life

considerably easier yes it can but because you're still dealing with physics sometimes it's not always going to be accurate so you take it with a grain of salt and hope by the time you actually get the chip manufacture and start using it, that you don't have any accidental antennas created.

From manufacturing faults or from the math not fully catching everything? Both. Because since the CMOS, like, lithography process isn't always perfect. It never will be perfect. You'll always have some amount of yields that are bad, some yields are good. This is known as the Silicon Lottery that everyone plays a game with when you use Silicon. If you've, for a more grounded example, if you've ever been interested in overclocking, for example, people will talk about finding chips that have been binned well that will clock higher than other chips in that line. Yeah.

It's one of those things you don't know unless you de-lid a chip and have the actual stuff to go to see the actual layers, which there is a way of doing that called iris using infrared light. And if you have a very good microscope that can see things on the Engstrom size, like sub-nanometer size. Like, you can probably sort of to see some of the problems. Right. Which is not exactly hard where most people are lying around. Yeah. To get that kind of hardware, you are spending a lot of money and probably a lot of

electricity to power that equipment. So how many times do you really want to go through this, this, this, testing to ensure that things are good before you take that next step to hardware production? It is very much you want to do it as much as possible until you are confident enough that it's going to work, which is kind of just like, how high can I scale this up before routing fails?

because you can own because chips are not infinitely sized and so if you can cram as much as you can until the problems start happening in your tools then great

when you start having problems with your tools and you're like time to scale it down just a little bit more and see what you can fit on that amount of density you have so in regards to this testing, where are you at right now?

Right now I am in the process of doing the up and down scaling of trying to find exactly how much I can scale this. Like I just, like this morning, I was able to check on it and see that after 23 hours and 40-something minutes that it failed at like 3 o'clock in the morning because one of the checks failed. which was literally like half a weekend of just my computer doing its own thing well on that note there how long how long have each of the steps taken so far so the design stage and now into the testing stage and i guess obviously that would lead to redesign as well so the initial design like the very bare problem of literally just a grid of logic cells was just a couple hours just to be able to see like if I simulate this with Rhodes simulators built in I was able to wire something up that was basic enough that I was like oh you have

A and B both set in a way you configure this as an ore gate it does an ore operation I got the number I want that is good and So that was just like literally an evening. And then getting to having it where it's like, I have the signal processing, I have clock trees, I have like all this, that took another couple weeks. And then it's literally just been a month of just, will this be good enough that it can actually be manufactured and won't explode or fail in some other way?

Right. How long do you... Maybe it's a hard thing to answer. How far away do you think you are from being ready to go to the next stage? Probably end of the month, actually. Okay. Because I am getting pretty close to figuring out what actual density I can be at in terms of how wide and large I can make the grid.

it's just a very slow process because I can make like a two-line change and then have to wait an entire day to see what the next result is going to be right because that's going to I guess it's going to have to change a lot of things along with it or is it just because of the testing

that needs to be done to verify that change basically just everything you do not want to modify a design you've already like put through the process of being what's called taped out so tape out is the entire process of going from Verilog to having that GDS file that is like

describing everything for to actually be manufactured at like TSM or whoever Right Okay Um Where did we go Sorry I forgot I lost track of where we're going from here

Um Sorry, my bad Um You said Testing Where were we going You were we going You were saying how long

Until like getting this act You like manufactured Yes, yes Thank you, yes Um well, what is the next step from here? When things are ready,

what happens then? Then I get to have the fun of giving it over to Waifer Space, Waford Dotspace, which is a Signaport chip manufacturing company that uses the Global Foundry's GF-180 MCU process node, which is a 30-year-old process node, and so in comparison,

a lot of people are on 7 nanometer, even that is still kind of fading out a little bit because of 4 nanometer, and then you have things like Intel 18A, which is 1.8 nanometer with about 18

angstroms. Uh-huh. Which I do not want to be spending millions of dollars, and so Waifer Space allows you to get a thousand chips for $7,000. And that's USD. That is considerably more affordable.

Yes. The problem is we're stuck with a third yielded process node. The benefit of a third year old process node is it's cheap. Everyone knows it. It will likely have a very good yield. Because as you go to bigger transistor sizes, the chances of physics screwing up less is less. That makes sense.

Right. I would assume that the smaller it gets, then you start getting into... I would assume if you make it smaller, there's much tighter tolerances for a lot of these issues that can happen. Yeah, and it also depends on how many bracts, which are also known as like the layers of your actual silicon.

Effectively, the more dense you make it, and the more layers you try to stack up inside the silicon, the more problems you can get, because you're kind of playing a gamble of just how physics works, especially with just how you manufacture the silicon, which a lot of times nowadays, it's a masculine, this process. Basically think of just like,

you use effectively an LCD screen with a photo mask that then just uses some special chemicals to then bond layers and imprint a design onto a piece of silicon and thus we have

thinking rocks. So with this process note, obviously you don't have the millions to do whatever Intel is doing. That would be nice. I'd like the millions to do it Intel's doing. I assume there comes some limitations with using a 30-year-old process node.

Yes, which is, it is not used that much, meaning that someone like WiferSpace just does limited runs. so they've done one round and now they're doing a second round but who knows if they're going to do another five rounds in the future or who knows if they're going to be around in 10 years like if you want a sustainable like manufacturing you would have to use someone like TSM

because they will be around for forever but that's just not viable for any sort of startup that doesn't have massive backing behind it? Yes. The good thing is at least Waifer Space provides a good entry point. So with Waiver Space, I'm able to at least get

some prototypes. I'm able to figure out the figure out known problems with my design. Things you can't. always check with software things that you'll only find out when you actually get hardware manufactured. What are some of the things in that case? Um, like the yield count, like the number of chips that are dead versus half broken versus actually fully working, uh, being able to also figure out some of the weird physics problems,

like how fast you can clock the chips, a little bit of the voltage constraints, because even though this is, I am telling it to use 5 volts, because of physics, sometimes 5 volts is not always 5 volts. So if you have like a double a battery, if you monitor the voltage over time,

it slowly drops off. And if you, And if you always get a new double-a battery, it is never going to be at the exact voltage you want. It's going to be in a tenth of the actual signal, or not signal, but voltage you want. What sort of problems does that cause? So, basically, if you drive it with too much voltage, you might let the magic smoke out. If you don't give enough voltage, then the transistors, literally do not switch.

Mm-hmm. Mm-hmm. And you want transistors to switch states because that's what they do. Mm-hmm. And if they are not doing it, then you are going to see unexpected behavior.

Anything could happen. Um, it depends on your design. Like, some CPUs may, like, lower voltages. Like, there is a concept of under-clocking. which is the opposite of overclocking. You can undervolt a chip, like you can overvolt a chip.

But there is certain constraints that, like, Intel, AMD, all those companies that have their own chips, they've figured that out because they have manufactured it. They've gone through physical testing to figure out what those constraints are. And so I have to do the same thing. I have to figure out how fast, how hard, how little I can drive the chip, how much like ultramatic interference this thing actually puts out because governments do not like radios that can interfere with things and because this can become...

Because silicon emit electromagnetic interferences, you have to be able to check and verify that this does not interfere with... certain things. I didn't even consider that as a problem. Okay, okay. I think it's an interesting sort of path to explore more. Like, what... How are I even phrased?

Like, um... Outside of the technical side then, like, what actually do you have to worry about with building a chip like this? Because I had not even considered the fact that it could interfere with other, like material in other

yeah yeah I mean that's why like if you get like a CPU that's why you'll see an FCC label on it is because you drive a chip fast enough you will see electromagnetic and interference if you have the right tools

which nowadays that's like a thing you can get on Amazon or even eBay for not that much money and so being able to show like oh this chip

does not create electromagnetic interference in a way that's like your Bluetooth stop was working because that can be a thing and that's why on old video game consoles

if you ever open them up there's a little RF cage because that is just enough metal that it blocks enough electromagnetic waves that it then doesn't cause that much problems Right. Okay. Okay.

And I'm assuming these are things that you can't really... You probably get something from a simulator. I assume there's estimations, but you can't really tell without the actual physical design. You get a level of accuracy that you do not know how accurate it is. is from the static analysis of the chip, because it's physics. You do not know how physics behaves until you actually observe how physics behaves, which is how we know how physics does things, because we've observed how physics works. Right. Okay.

I guess once you've done this actual manufacturing, with Waferspace What happens then Do you Like, I guess yeah What happens then? Then I get to Test and verify

1000 chips Right Do you have any Inkling of the idea How long that would take? Um Oh Basically I need to figure out

How to actually verify Silicon Which is Basically figuring out how to create a test bench Where then I would be able to plug a chip in And then Push a button And then It would have to run through a various set of tests

Like Being able to live load a bitstream on, which is the program of an FPGA, then try to see what happens when I drop the voltage all of a sudden, or what if I increase the voltage on, or just all these magic things that usually happens with chips in the world. Do you have any thoughts on how you're going to handle this, or is this something that's a future you problem? Um, both.

Um, the... one of the ways I've had is if you're familiar with fuzzling in software, that is basically you do a bunch of randomization and then see what happens when code gets random values and see if that breaks.

And so my idea was basically have a bit stream that, or rather a program that gets loaded on that has a amount of randomization to it that is predictable to then where I can derive the output from the randomization and then see whether or not the chip outputs the values I want. And so then run that for maybe an hour and hopefully things are good.

The less, the more predictable ones would be just be like, bring up voltage, bring down voltage, check what chip is doing, maybe have like something that just counts numbers to infinity and then see like what happens to that when I drop the voltage or when I increase the voltage. Right. And hopefully, yeah, what, do you know what like a good yield it would be? Um, about 80% so that'd be like 800 chips. It is hard to say because this is the first, this would be the first batch. This would be like the first time this design has ever been put into hardware.

And so it would be hard to kind of figure out like what kind of yield I can get. But since this is using a third yield process though, that is like very predictable, not really, predictable but it's like the limitations of the design has been known for so long and that because it is by nowadays, two day standards

it is a boring process node. No one wants to mess with it because there are shiny new things like Intel 18A and like TSM trying to do two nanometer or whatever they're doing nowadays. Okay. So, once you've done the testing, once you've done your, you've got your chips, I guess what happens with them?

What do you do with your theoretical 80% yield? Then I'll be crowdfunding. Again, development boards out, and then we should be able to buy one of these chips, or boards with a chip on it, and a devour board would probably just have like a bunch of random things like headers for plugging stuff in, buttons, lights, jumpers, just usual things kind of like what you'd see on a regular FPJ or kind of like what you might see on some sort of like carrier board for like a Rathaway pie or something. It's just enough that if someone wants to play around, have enough fun little things to try to do something with.

So actually, that's a good question. Earlier on you mentioned how a lot of the tooling around FPGAs for the ones that have traditionally existed as been proprietary. How would somebody, I guess, mess with this FPGA? Like, what would they need to do with it? All they would need is the open source tool chain that everyone else uses.

I have Nix stuff there that makes it easy. So you just pull in Yosis, you pull in NXPNR, and then all you need is just my fancy little Rust program that just

back to set into a binary format for the chip. And it's literally just a Nix flake. So it is easy to get working. There's also darker there's dark green containers

there's stuff for apt so using this not on NixOS is possible so now this has been like

having some discussion what has been the initial response like very positive at first I tease a little bit on Twitter

like a week or two prior and then I was kind of like, well, it seems like there's interest. I put it out. And then like I get Twittered, I was getting Twittered notifications for like a week straight.

And then I look on GitHub and now it's at 300 stars. Mm-hmm. Okay, okay. I guess, obviously that's like general interest. But like what has been the, I guess, What has been the more

Hey, I'm interested in actually having one of these interests like Oh, I've seen a decent amount of people That want this in some form There were, I made a couple of GitHub discussions with polls And it seems like people want this thing There could be more interest Especially when I do the Kickstarter And when I actually have D chips in my hands

Right, that's obviously like a That's obviously like a big thing, right? It's one thing to say, hey, here's this thing I'm working on, it's still in testing, we don't actually have production yet, once it actually exists as a real thing that you can demonstrate functions, that changes things. Yeah, especially if I can bring this to like, conferences, then I can

show in person this thing does the thing you can get it. So on the GitHub page you do link out to a number of other open source

FPGA related projects. I guess what you said this is an open source of FPGA, like, are there any other examples out there at all? Or is, like, what makes this special? Um, so there is, uh, fabulous. Uh, and then there is also, I believe it's called Open FPGA. And both those are kind of like a framework to design an FPGA. Both have the parameterized way of just being it. It would be like, I want an, and if,

with 700 logic cells. Well, that is great. You have a good starting point. The problem is that is just a starting point. This is... Mine is, it comes with the tool chain, it comes with the actual silicon design there. You can see everything,

and we have defined a set of actual chips. Like, you can look at it, there is Aegis Luna 1, there's Aegis Terra 2, or Terra 1, there is going to be future chips that will be added there. Then there's also the

Gatemate, the Colognade chip gatemate, I don't really not to say the name because it's kind of spelled it a little bit weirdly. Maybe, I don't know, it's on the list. You can look it up. And that

So it has an open source tool chain using Yosis and XPNR, which are the open source standards for standard FPGA tools. The problem is the silicon is still close source. You can buy the chip, but what is inside the chip? How does the chip actually work?

That is not open. You do not know how that chip was actually designed. You just know, I have the tools This is what it might look like But Inside You'd have the pop lid open

And see what's inside the silicon Which It's not cheap You don't want to delid a chip Because that might damage the dye inside So with the case of this chip Like in the case of your chip Everything is open then

Yes Everything Like you can literally look at it and you can point to a physical wire on the chip and be like, oh, that was defined here. So, if

somebody wanted to then, they could go and produce their own chips based on this design? It does. You can do that. It's expensive, especially if you try to scale up the design more. It is. Then you have to also have the

problem of verifying it. There is just a lot of problems. It's like a similar thing with like security. You do not want to do yourself because it is expensive. You could run to your own problems of just like trying to do this yourself. Like sure other companies have a lot of resources can at the same time they could always come up with their own design. And a lot of the industry has been used to, designing a lot of things by hand. And since this is a very automated way, this has a different approach than a lot of what has been done in terms of silicon.

So I wasn't saying that someone could just like easily go and do this and so obviously, you know, it's taken you along quite a while to verify the design with the powerful harbor you have. My point was the fact that if somebody, had the will to do so if somebody had the time, had the resources, then that could be done. It can be. It's just not a lot of people want to do it because it just it is a difficult process. So, once all that happens, what do you want to do from there? Let's say

first initial run goes well, you sell most, if not all the chips. What happens then? Then, uh, so I plan on scaling the chip up. I want to get to a hundred thousand Lutz, which is big enough to basically have a arm processor from like 2013 to 2015 somewhere on there. Like, you can have a decent enough processor defined and loaded on to the FPGA that it is not going to be, like, running Doom on a slideshow. You could at least probably get to something that is a reasonable 20 FPS, like, if you're trying to do, like, software-based graphics on this chip. then from there I'm going to be designing two other things

one is a secure enclave the other is a risk-fired CPU this is all under the mid-stall company that I'm creating with the chip as it currently is

obviously it's hard to really say the full extent of it But what is it this first generation most likely capable of? You can probably do, like, the big thing is just like USB controller. Like you could hook up a keyboard matrix and then have a USB cable coming off the board. You plug it in, oh look, Windows says there's a USB keyboard there. you push a key, you get a key back.

Very simple stuff. You could try doing this in physical logic chips as well. It would be bigger. So that is a capability. Another one is like LEDs. You could make a circle of LEDs spin around, do a little bit of some fancy whatever. another one could be

like a U-Rt controller like you plug in the board and then you just see in a U-R like serial console the B-movie script coming out right right so the

cave builders of it would still be relatively limited in its current form yes it is a respectable design because there's at least a few hundred logic cells. The number that says for Luna 1 can change because I'm still working through

trying to figure out the exact specifications I can fit right now. But it'll be somewhere between about 600 to about 760 logic cells, which is a respectable amount for a first design, and then the next design is going to have about 2.2,000. So a factor of four increase So the next one

Sorry, the next one is, is that Terra one or is that you're saying a different thing? Terror one is going to be the one with 2.2,000. Okay. So the next generation. The one you are currently working on, that is lunar one. Yes.

Okay, okay. Right, okay, that makes sense then. Okay. Because there's the two different ones listing. here, I wasn't, yeah, okay, that's, that's making a lot more sense now. So, Lunar 1 is the initial design, Terra 1 is where you go from there. What, um, I may, again, this is more stuff that doesn't yet exist. What would additionally be possible with the extra, I guess, logic, uh, logic cells there?

like in the future i'm wanting to do like uh radio processing so like um doing um bluetooth what is it lora lora is another radio thing i don't know too much about it but it is a simple yet complicated enough that with a slightly bigger chip i could probably fit something on there, do something with LORA. Then I'm wanting to eventually go to being able to do Risk 5 CPUs, which require at least tens of thousands of logic cells. But you could also do like an X-86 CPU,

you could probably do graphics chips. A lot of things are possible with an FPGA. like I know finance like a lot of finance companies uses them I think like Jane Street has one like AMD produces these very expensive very beefy FPGA cards are used for like

financial databases because if you define them in hardware you get extreme speeds from that kind of stuff like tens of gigabits per second I don't know if you happen to know just so it's like a point of reference

people have. I know there are these like FPGA NES projects. Do you happen to know like how powerful those would need to be? I don't know those ones but if I have to take a guess

I'm assuming that Terrell one might be able to do it. I would have to take a look, one of the problems with FPGAs is, even though the logic cells are kind of what people look at to refer to, like, the capabilities, you have other things like the DSPs, you have, like, the Mux Tree, you have different clock tiles, but it is hard to compare between different vendors and different chips, what that chip is actually capable of.

because of just how tooling decides to place things. Okay, okay, that makes sense. Basically, it's in range of doing it, but you're not certain. Yes, it is, I would have to try it and see what fits. But if I had to take a guess, considering because you can do Risk 5 on about 10,000, lots, you can probably do an NES on about 2.2,000. And a risk-fied CPUs, I would assume, can be more complex than an NES. Right, right.

So, I guess as you're scaling out, what is your, what is the plan here? How do you plan to take this from being just these, first chip you do and then the second one you've planned out, how do you plan to expand it from there? Well, since I don't have all the knowledge that I'm going to do this, I have enough to be dangerous and create things like this. My plan is when I do the crowdfunding and then with some rounds of investment of being able to hire some people that actually know this stuff more than I do. And then get them to do the thing of scaling it out. Right, right. Which kind of tends to happen with these sorts of things.

You have someone that knows enough but doesn't know everything. And then you get interest and then it just explodes in terms of capabilities and complexity. We're sort of like really expanding far out now But like would you like to always have some sort of hands on It's just Way far out Would you like to always have some sort of hands on roll here Or would you want to step back and

Be in a position where the people who are Experts in this space are the ones that are Really driving things forward I always want to be able to be able to be able to be to have like the like being able to give feedback I always want to be able to like contribute in sub substantial way even if I don't understand all the problems I can still gleam what's kind of going on like I've I've got friends that do A6 things with like risk five chips and even though I didn't go to college to

learn this I've I've seen enough I played around enough that I can kind of gleam enough to be able to see what ideas I could throw out there. This is all stuff that's like well into the future. Like 10 years from now. Right, right. So, I guess, yeah, like, honestly, I think this is a really cool project. Like, this is a space that I've just never really,

not even just like hardware development, even just hardware hacking, it's just a space I've never really delved too much into. I've always wanted to mess more with hardware stuff. It's just, it's not something I've, like, you know, the main difference between doing software and hardware stuff is the barrier to entry with software is the computing device you probably already have, right? with hardware you're at some point going to have to move things into a space with hardware, purchase things and all of this. Yeah, like

you, like there are basic enough FPGs that you can do like pretty cool things with you're still having to spend some amount of money. Like you cannot avoid the money problem with hardware. It is, FPGs make that much more accessible

because they're effectively programmable logic cells inside. And so you can just define things that are hardware. So, I don't think we touched this earlier, but where did your interest in hardware come from? I don't know. I just have a lot of interests, and then I decide to mess with something, and then I kind of just go down a rabbit hole.

This rabbit hole has led you quite a way, though. Yes. I mean, that's how I ended up writing an operating system when I was in middle school Okay, right? Yeah There is a lot of There is a lot of documentation on doing that, though I don't know what was present

I don't know how much of that is more recent stuff But at least now, if you want to learn how to write an operating system the documentation is absolutely out there it's very obviously it's complicated you're still writing an operating operating system but if you have the drive to do so it is a relatively

approachable subject it's not an area where you're lacking in good resources on how to do it yeah especially with languages like russ today like there are like

doc book wikis that are just like or like read the doc websites that are just like, for five pages of how you can write a basic operating system that prints Hello World and has memory management, stuff like that, you can just do it in a weekend. But with like 10 years, like, I think more than 10 years ago, this was like 20, 13, somewhere around that time, I wanted to write an operating system for some reason. And then the one resource that kind of existed at the time that still is around is the OS dev wiki.

It has a lot of information out there. At the time, a lot of the information was still, things like, focusing on chip on processors from the 80s and 90s because those chips were simpler.

Like, designing an operating system that runs on a 46 is not that hard. in comparison to like writing a 64-bit operating system with like user mode

and a network stack and all that like getting to that point gets very complicated and like doing that all in C is complicated and not having things break with like modern things of like

rust and like I know people will not like this but like AI like say as much as you will but like how things are with like AI as a tool, and this is coming from someone

who's been writing code since, like, 2012. It's a very useful tool, and you should take it with a large green as salt, but when you have tools like cloud code, if you know how to approach it from the right way, it can make workflows be a little bit more manageable. I do want to talk a bit about the AI usage because this is something that's

it's really, you can't avoid at this point, right? Like, any, I know there are the becoming greybeards, the soon-to-beards of the Foss World, the now late 20, early 30-year-olds who, they've been involved in the Foss Space since they were 18, AI wasn't a thing yet. But now with this, like, I've said this many hundreds before,

I have friends in education, every single new developer is basically using AI, whether it, like, to different extent, but they're all using it. This is something which is happening. We can pretend like it's not happening, but it is. And I understand wanting to do like artisan programming. You just enjoy the craft of programming, right?

You know, people garden without using certain tools. Like, sure, whatever. Totally fine. Like, absolutely respect. If that's what you want to do, if you want to build a house using hand tools, hey, totally fine. You're there. It's there to do it.

But obviously you did use Claude to some extent. through this. What was that like? What did it help you do? And I guess what are some of the limitations you ran into as you were going through this? So one of the

like, so one of the nice things is Claude Code. It is there are huge amounts of security concerns. So I recommend if anyone's using this thing, please run it in a microvm. Do not give it access to your full system in case something happens. Yes, there have been cases of...

I don't know if it was Claude Code, but some of... One of these systems being like, hey, just that database? Nope. Bye-bye. And if you don't want to use Cloud Code, please stay away from OpenClaw. There's a vulnerability like every three days.

But aside from that, when you have a AI model that... tends to, that has the ability to run commands and kind of introspect what's going on, has a way of being able to kind of decipher and sort of not really learn, but it has the way of picking up on how to approach things in a more, in a, in a way that's going to cause less problems. Like you were like, hey, I have this problem. please help me through it

and it will kind of be like well let's look at the log files let's see what the error is oh it erred because you made a typo you can just fix this by just renaming and so like it does get a lot more complicated especially with what I'm doing

but with how much content there is on the internet and with how much these models have been fine-tuned and trained on like the collective knowledge of the world it has gone to the point where you can use

AI to design hardware like two years ago it could barely write software nowadays anyone can make a SaaS product there are going to be security concerns I recommend people please don't use AI for security things unless you know exactly what you're doing and you know how to approach security

because you do not want holes your insecurity. But when you're designing something like hardware where it's like something that doesn't really have any security impacts and if you can own up to it and you can stand by the output that it gives and you're certain that it will not have a problem, then use it. Like, it, yeah.

So, I guess, what are some of the problems you've run into with it? Um, it being sometimes inaccurate, where it's just like, oh, let's just change these things because it seems like that error is like impossible.

And it's like, well, no, let's just actually fix the problem and not work around it. Like, like, sometimes it will use these little hacks,

but I'm like, when you have hardware or if you're wanting something to actually be like good, you do not want hacks. You want a real solution that will work. And it's like fine for testing like this little thing

that is okay. Like a little hack to be able to see like what's going wrong. Why is this thing this way? A little hack there is fine but mix it up before you actually like get this out of the door. Mm-hmm, mm-hmm. Right, okay.

You made a good point there about, like, very recently not being out of just even handle basic software tasks. I don't know, I don't work for one of these big companies. I presume to some extent they are using this tooling, right? I would be very surprised if companies like Intel haven't played with the idea, I haven't been... Like, pretty much every big company

is trying to see how they can fit this into their workflow, whether it be to just make things cheaper, whether it be to improve things, different discussions, different companies. But I think

it's really hard to say that any of them wouldn't be looking at it. Yeah. AI is definitely one of those things that a lot of companies are using now. It's hard to say how they're using them. I know Intel has actually used some of this stuff for working on the Road, R.O.HD. HCL, which is the hardware component library, of trying to add things like cash,

like trying to add a physical cash thing to a chip. It can just, if you give it enough information, it will do its best attempt at it. And you might have to fix it up, but if it gets you 70% there in five minutes, you've just saved probably a few hours of work. And so with how fast things are moving, moving today, sometimes it is better to have a quicker start to then being able to get to

somewhere that you can at least get some result out of it. There's, I think early on, there was all this discussion around this like vibe coding, all of this stuff. I think there is a very big difference between somebody who is skipping along the line and doesn't have that foundational knowledge and someone who is using it

as a way to circumvent the work they're doing. A great example of this actually is in the kernel developers like Sasha Levin

this is a very established invidia engineer they've been working in the kernel who knows how many years at this point and

obviously Invidia, I'm sure invidia encourages all of their employees to use AI as much as possible. You know, the AI shovel company very much wants to get the AI stuff out there as much as possible. But this is someone who is

like this is a very established engineer, right? Like this is someone who there is no questioning their foundational engineering knowledge. And this by all accounts has just augmented the amount of work they can

do rather than trying to replace it. I don't know where we'll be in, you know, 10 years from now, right? Are we going to be at a point where these systems can fully replace a human engineer? I don't know. I don't have any thoughts on that. If you do, feel free to let me know. But I'm just... I think at least for the foreseeable future, we're going to see a lot more of the...

the augmentation, and that's going to be for good or bad. A lot of these recent vulnerabilities we're seeing in Linux have been discovered in the same way. There've been these AI-powered vulnerability discoveries where an established researcher uses these tools in a way to be able to examine just the amount of code that exists in something like the kernel. Yeah, like I even tried using Oupus 4.7

for like security review stuff and I've written code for like 14 years now and it is a little bit scary of how good this stuff has gotten and so like AI will make errors so will people like thing like when you involve people there will always be false but the problem like at least for security uh you want to catch these problems before someone else does. I know a lot of people will say like, oh, this is a slop vulnerability, but it's like, if you can still prove

that there is an attack surface and that it can be exploited under normal conditions, someone else will exploit it. Might have been, someone could have exploited it when this was first introduced, or it could be no one has tried, credit yet. Security things

are just a gamble. And being able to have the people that run a project or have good faith in reporting finding problems first before backed actors do, I think that is

a much more positive thing from this. Yeah, I think that's a important point there. We can put our heads in the sand and pretend like this doesn't exist, but bad actors will be using the tooling in the same way. They will be using the tooling to find exploits.

And just because someone is, you know, we can say, oh, look, I'm this well-established engineer. I work at some big company. Yeah, that might be true. But there's also really talented engineers who are more than happy to work as a state hacker. Like, that's also a thing that does exist. and I don't like the position that a lot of projects have been put into.

I would love to go back to a time when this wasn't a problem, when we could all just be happy writing code that we all just assume as, you know, security through obscurity. We just, we assume it's safe because, you know, no one's seen a problem. Yeah, it's probably fine. But we don't. We don't live in that world anymore. It's long since gone, and we have to adapt to it.

And thankfully, the people who are in positions where they need to worry about the security, like the Linux kernel with various other things like that, whilst they might have their concerns regarding the introduction of AI commits, and I know this has been a discussion a number of times in the kernel, It's been a discussion in Fedora recently there's a big argument happening Fedora right now I assume over in Nick's space there's been lots of discussion about this as well

Katie has a recent discussion about AI contributions all of that is happening but at the same time you can't ignore the fact that this is going to be exploited whether you like it or not yeah and like AI or not

there's been times where people will just find vulnerabilities like yes yes the kind of problem is it's like as more people see it and you have people with the right knowledge

vulnerabilities will turn up the kind of upside and downside is AI is just but at sifting through things and if it happens to catch something and a bad actor gets that first, then they'll try to exploiting it. But if you're able to catch it before them and fix it up and get it fixed

and the exposure to it removed as much as possible within a short amount of time, that is the most important thing. Moving the security barrier, removing security-related problems, is the most important thing for any project. yeah yeah um I do

look I do that wasn't a joke before when I said I do kind of wish we here back to a time when this wasn't a concern but at the time everyone's kind of just falling themselves right it's like oh

we've ever you know the colonel's been seen by so many people there's no way there's problems like this there's no way you know there's been a a problem that's existed in the kernel for 14 years

that no one's even noticed was there short, that can't happen so that's impossible well yeah and also like a lot of people who deal with security will often follow those kind

of belief of there is always a vulnerability so you have to treat things as always being exploitable you just need to prove once you prove that a vulnerability does exist then you patch it

then you continue to believe there's a vulnerability somewhere else at least then you have a sound mind of knowing that this one problem is no longer a problem hmm okay yeah that is a yeah okay I right so assume the system is always exploitable in some way you've just not yet proven how it is exploitable yeah which is why a lot of like the zero That's why in, like, what was it, like, the mid-2010s when, like, the, like, zero-trust thing became, like, so popular, because treating things as not being secure by default is just a good practice.

You do not want to be running random code. You do not want to be opening the doors for random things. and that's kind of why having denialists aren't the best and why specific and explicit ways of allowing things in is a better model

hmm hmm okay yeah I pretty much all agree we got very side tangent in here didn't we well I do deal with a lot of different things yeah

I can tell I can tell I still probably should get back to the chip assuming there's anything more to really add to what we had already discussed I can't think of anything else you know we never actually did I just realized I assume anyone who

didn't understand already left maybe you're still here can you give like a proper clean explanation of an FPGA. We probably should have done that a while ago. So basically imagine a grid inside of the grid on each row and column, you have a logic cell and that represents that's a reconfigurable logic cell

and you can make it do an and or XOR, stuff like that. Between the grid you have a bunch of wires that allows you to route things in a complicated way for simplicity a lot of times it is each tile inside the grid follows the cardinal directions so you want to talk to the neighbor that's adjacent to it you're likely going to the east if you want to go down you go south and so the things kind of spread in that way and yeah if they will like on the edges usually you connect to different things like you could connect to different things you could connect to an iopad, which is just like, you know,

a single wire that you shove like 1.1 or whatever voltage through it, and then that represents one. Or you turn off the voltage, and then you don't get, then you get a zero. Very binary

electronics. But basically you just have so many logic cells. They can reprogram in a way and configure the routing in a way that you can just design a lot of different kinds of hardware.

Like, CPUs, GPUs. You can even design FPGA and run FPGA on an FPGA. For any reason in particular, or just because you could? Um, I mean, you could do that way for testing,

but also you can also just use a simulator for testing. At that point, it's kind of a hard game because then it's like, hard to kind of figure out what might work better especially with testing hardware especially if you have things that are

analog components, especially dealing with signal processing, which is very analog. And if you ever look at signal processing chips, they have a lot going on. Fair enough. Fair enough. I didn't ask you about the name.

Where did the... Where did the... Where'd you get the idea for the name? Oh, Ages. Yeah. Well, there's two ways I got to the name. One was, if you look up what Ages actually is, the, I think, Greek word for it, makes sense of what it is. And then if you've ever played Prisona, there was a character called Aegis, but with an I.

The robot girl. Yes, yes, yes. Fair. Okay. Yeah, that, that's the story. That's it. Yeah, I was like, I was just like trying to think of a name.

I was sitting there for a few seconds. And then just, Ages from Persona came up. And I was like, well, there's a Greek word called Ages, but it spelled with an E, not an I. That's close enough. And the description makes sense.

Okay. Well, that. works, I guess. If people want to express their interest in the chip, in a board, where can they go for that?

The discussions page on GitHub, there are two discussions, one for Luna, the other one's for Terra, and so then just vote. Okay, okay.

It will be crowdfunding in the future. Do you have a plan for when? I know you said you wanted to get things like the hardware ready by the end of the month, but... Yeah, so that's kind of a problem is manufacturing takes a long time,

so I'm thinking Waiper Space will have it being manufactured in November, which means I might have it early next year. I do not know. It is very much on the timeline of when I have chips in my house.

Okay, okay. So, eventually. Eventually, which is why it would be good to follow the project on GitHub. It's also, there is a, what's it called? Not hacker news, what's that other one that starts with hacker? Space? I think that's it. There's like, it's like, it's like dotio.

the domain, but like you can submit things to it, but I put it on there. But there's always Twitter. Hackaday? Yeah, hackaday.hackaday.com. They have a way of submitting stuff to it, and so I put ages on

there and there can be some updates in the future from there, but also from the midstall Twitter. Okay, okay. we got there eventually Was there anything else You wanted to mention about Either Midsole or the chip

Or Yeah I don't know I mean it Might be one of the first Knicks built completely chips Just do a single Nix build Wait about 20 hours

And then you have a file of Silicon That's cool Well 20 hours in the hardware you have yes if you're trying to do this on like a MacBook Neo you just can't

because you don't have enough RAM you need probably a few hundred gigs of RAM I've seen this use at most about 460 gigs right um

right this is why bigger companies use clusters I uh I I I understand. I understand. That's a lot.

That's a lot. Well, it's NP hard. Very NP hard. And just a lot of academic problems that people have found over the past 40 to 50 years. Okay. Okay. So nothing else you wanted to get to then? Pretty much that's everything?

That's it. Okay. If people want to... You already mentioned the discussion page and the Hacker Day when we eventually worked out what the site was. Is there anything else people can check out or if they just want to check other stuff out you're doing? There is midstall.com which has all the stuff for Midstall on it. There is my own Twitter account, Ross Computer Guy. Twitter didn't let me have the I usually do all my profiles

but a lot of things there's also my game which is Ross Computer Guy and so I do a lot of things that people can follow me do okay um yeah that

nothing else in that's pretty much it that's it okay cool um My main channel is Broody Robertson. I do Linux videos there, six-ish days a week. I've got the gaming channel, Bruton Games. Right now, I don't know what to be playing, because this will be out in a few weeks.

Hopefully by then, actually, the chip should be getting ready to be produced, hopefully. Yeah. And if you're watching the video version of this, you find the audio version basically every podcast platform. That is Tech Over T. The audio version is... Wait, sorry, what did I say video or audio there?

I don't... Sorry, it's three in the morning right now. Videos on YouTube, Tech over T, Spotify video as well. RSS feed for audio. You've heard the outro a hundred times already. You know where things are. Anyway, I'll give you the final word and what do you want to say. A cat is on the cat tree

It has jumped up and down About four times throughout the episode Is that the same? It's just one cat? Um I think Yeah It has been a... Okay, you do have more than one cat though

Have three Oh, there have been cats Moving back and forth the entire time So I don't know, might be a different cat Who knows? Probably the same, she likes that spot Hmm Well, I guess we'll ask

Signed off with that.