The Good Tech Companies - Botlagunta Preethish Nandan Unveils an AI-Powered Framework for Next-Gen Semiconductor Design

Episode Date: June 17, 2025

This story was originally published on HackerNoon at: https://hackernoon.com/botlagunta-preethish-nandan-unveils-an-ai-powered-framework-for-next-gen-semiconductor-design. Preethish Nandan proposes an AI and data-driven framework to streamline chip design, enhance yield, and tackle semiconductor complexity at sub-3nm nodes. Check more stories related to machine-learning at: https://hackernoon.com/c/machine-learning. You can also check exclusive content about #ai-semiconductor-design, #chip-design-automation, #preethish-nandan, #computational-lithography-ai, #high-na-euv-optimization, #ai-in-chip-manufacturing, #data-driven-eda-tools, #good-company, and more. This story was written by: @jonstojanjournalist. Learn more about this writer by checking @jonstojanjournalist's about page, and for more stories, please visit hackernoon.com. Botlagunta Preethish Nandan presents a unified AI and data engineering framework for semiconductor design. His model enhances chip layout, yield prediction, and automation by integrating real-time analytics, interpretable AI, and scalable data pipelines—reshaping how chips are designed in the age of High-NA EUV and 3D architectures.

This audio is presented by Hacker Noon, where anyone can learn anything about any technology. Batlagunta Prithish Nandan unveils an AI-powered framework for next-gen semiconductor design, by John Stoyan journalist. The semiconductor industry currently stands at the crossroads of rising performance demands and relentless complexity, along with growing challenges related to design optimization and manufacturing efficiency. Data analytics on die-driven computational lithography expert Batlagunta Prithish Nandan has recently unveiled a framework for next-generation semiconductor design by integrating data-driven insights in AI-augmented automation. In his research paper titled, Integrating AI and Data Engineering for Intelligent Semiconductor

Chip Design and Optimization, Nandan has advocated a critical shift for industry. He mentions that traditional design methods are increasingly outpaced by the demands of sub-3nm and high-naught EUV lithography nodes because they are burdened by manual processes, rigid workflows, and fragmented data streams. His integrated framework bridges this gap to streamline workflows, optimize design processes, and enhance yield predictability. Understanding the challenge the semiconductor industry has witnessed serious transformation in recent years, with devices becoming increasingly complex and multifunctional.

Nowadays, chips integrate billions of transistors, each with intricate interconnections. The challenges have escalated exponentially as the industry has started incorporating emerging architectures such as 3D-stacked chips and heterogeneous integration. Traditional design processes are dependent on static verification methods, manual intervention, and isolated data streams managed by disparate EDA tools. This fragmented approach can result in inefficiencies such as limited reusability of design data, design bottlenecks, and risk of late-stage failures. Also, as chip design integrates multiple functionalities such as RF, analog, digital, and power management,

unique datasets are generated by each domain that must be harmonized for coherent analysis. This complexity makes it extremely important to adopt approaches that can manage high-dimensional datasets, break down data silos, and ensure seamless decision-making across the design and manufacturing pipeline. In the absence of integrated data and automation frameworks, design teams are reforced to navigate an ever-growing maze of complexity, risking costly errors and extended design cycles. It's no longer enough to rely on incremental improvements, we need a paradigm shift that

unifies AI and data engineering for intelligent, scalable design, Nandon emphasizes. Data-driven and AI-augmented design optimization the solution proposed by Nandon centers around an end-to-end, fully integrated data engineering and AI pipeline. This approach addresses the concern areas related to data fragmentation, manual bottlenecks, and limited interpretability. Systematic Data Engineering Frameworks. This strategy utilizes an adaptable data pipeline architecture that can perform systematic data collection and preprocessing from design, simulation, and testing stages, standardization of heterogeneous data formats to ensure compatibility across design tools,

dynamic data augmentation, and real-time updates. The framework ensures that no critical design data is left unutilized by establishing a data-centric foundation. It creates a holistic data set that feeds AI-driven analytics through integration of statistical circuit models, design metadata, and performance logs. AI augmented design automation, including supervised, semi-supervised, Andre enforcement learning algorithms, AI models are deployed to predict yield variations and optimize layout performance, generate adaptive test patterns for comprehensive fault coverage, and automate logic synthesis, placement,

and routing decisions to reduce manual intervention and turnaround times. AI doesn't just automate routine tasks. It enables intelligent exploration of vast design spaces, accelerating decision-making and enhancing accuracy, nandonotes. Our models continuously learn from historical and real-time data, allowing for adaptive optimization as design requirements evolve. Key features and innovations with several innovative features, Nandon's integrated framework not only addresses existing bottlenecks but also unlocks new levels of design and

productivity excellence. High-dimensional data management. This framework applies advanced data clustering, compression algorithms, and pruning techniques to distill essential information while minimizing storage overhead. It ensures faster retrieval and analysis of design data, cross-project data reusability, and adaptive data curation by implementing dynamic data hierarchies and intelligent tagging. Cross-layer AI integration. The framework enables AI models to learn and act across layout, circuit, and manufacturing stages. This includes adaptive logic synthesis models that refine placement and routing strategies in real-time, predictive algorithms that anticipate yield impacting issues based on nearly staged data, and machine learning-based defect classification systems that enhance fault coverage and reduce false positives.

Real-time decision support and automation. The framework employs real-time inference engines and streaming data pipelines to provide instant feedback during design iterations. Some key innovations include dynamic reconfiguration, integrated anomaly detection, and automated error recovery and rerun capabilities. Enhanced interpretability and explainability. The framework incorporates interpretable AI models capable of generating human readable explanations. Scalable infrastructure for future innovation. The architecture also supports future extensions

such as integration of quantum computing in neuromorphic architectures, accommodation of heterogeneous integration and chiplet-based designs, and alignment with emerging standards for low-power, high-reliability applications. Future Possibilities The integrated iData engineering framework proposed by Nandon offers a scalable blueprint for future innovation. His vision for the future emphasize escalable

automation frameworks for evolving design paradigms, scalable automation frameworks for evolving design paradigms, scalable automation frameworks for evolving design paradigms, and ethical considerations, including explainability, bias mitigation, and data privacy in AI-augmented semiconductor workflows. In the next decade, we foresee a transition from isolated, tool-centric workflows to holistic, AI-enabled design ecosystems where data flows freely, decisions are automated, and innovation is continuous," he concludes. "...Our integrated framework is not just an upgrade, it's a reimagination of semiconductor design for the era of intelligent automation." Thank you for listening to this Hacker Noon story, read by Artificial Intelligence. Visit HackerNoon.com to read, write, learn and publish.